Datasheet > CY14B101L-SP25XCT

CY14B101L-SP25XCT

更新时间： 2024-01-30 15:50:05

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		静态存储器
页数	文件大小	规格书
18页	1205K
描述
1-Mbit (128K x 8) nvSRAM

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中文翻译

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数据手册

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CY14B101L-SP25XCT 数据手册

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PRELIMINARY

CY14B101L

1-Mbit (128K x 8) nvSRAM

Features

Functional Description

• 25 ns, 35 ns, and 45 ns access times

The Cypress CY14B101L is a fast static RAM with a

nonvolatile element in each memory cell. The embedded

nonvolatile elements incorporate QuantumTrap technology

producing, the world’s most reliable nonvolatile memory. The

SRAM provides infinite read and write cycles; while

independent, nonvolatile data resides in the highly reliable

QuantumTrap cell. Data transfers from the SRAM to the

nonvolatile elements (the STORE operation) takes place

automatically at power down. On power up, data is restored to

the SRAM (the RECALL operation) from the nonvolatile

memory. Both the STORE and RECALL operations are also

available under software control.

• “Hands-off” automatic STORE on power down with only a

small capacitor

• STOREto QuantumTrap^TMnonvolatile elements is initiated

by software, device pin, or Autostore^TMon power down

• RECALL to SRAM initiated by software or power up

• Infinite READ, WRITE, and RECALL cycles

• 10 mA typical I_CCat 200 ns cycle time

• 200,000 STORE cycles to quantum trap

• 20-year data retention @ 55°C

• Single 3V operation +20%, –10%

• Commercial and industrial temperature

• SOIC and SSOP packages

• RoHS compliance

Logic Block Diagram

CAP

QuantumTrap

1024 x 1024

A₅

POWER

STORE

RECALL

CONTROL

A₆

A₇

A₈

STORE/

RECALL

CONTROL

STATIC RAM

ARRAY

1024 X 1024

A₉

HSB

A₁₂

A₁₃

A₁₄

A₁₅

A₁₆

SOFTWARE

DETECT

A₁₅

A₀

DQ₀

COLUMN IO

DQ₁

DQ₂

DQ₃

COLUMN DEC

DQ₄

DQ₅

DQ₆

DQ₇

A₀

A₄

A₁₁

A₁₀

A₁

A₃

A₂

Cypress Semiconductor Corporation

Document #: 001-06400 Rev. *E

•

198 Champion Court

•

San Jose, CA 95134-1709

•

408-943-2600

Revised January 24, 2007

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与CY14B101L-SP25XCT相关器件

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