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CS4340A-KSZ PDF预览

CS4340A-KSZ

更新时间: 2024-02-08 06:38:49
品牌 Logo 应用领域
凌云 - CIRRUS 转换器数模转换器光电二极管
页数 文件大小 规格书
21页 676K
描述
24-Bit, 192 kHz Stereo DAC for Audio

CS4340A-KSZ 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP16,.25针数:16
Reach Compliance Code:compliant风险等级:5.69
Is Samacsys:N最大模拟输出电压:2.88 V
最小模拟输出电压:1.62 V转换器类型:D/A CONVERTER
输入位码:2'S COMPLEMENT输入格式:SERIAL
JESD-30 代码:R-PDSO-G16JESD-609代码:e3
长度:9.91 mm湿度敏感等级:3
位数:24功能数量:1
端子数量:16最高工作温度:70 °C
最低工作温度:-10 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260电源:3.3/5 V
认证状态:Not Qualified座面最大高度:1.75 mm
子类别:Other Converters最大压摆率:18 mA
标称供电电压:3 V表面贴装:YES
技术:BIPOLAR温度等级:COMMERCIAL
端子面层:MATTE TIN端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:3.9 mm
Base Number Matches:1

CS4340A-KSZ 数据手册

 浏览型号CS4340A-KSZ的Datasheet PDF文件第3页浏览型号CS4340A-KSZ的Datasheet PDF文件第4页浏览型号CS4340A-KSZ的Datasheet PDF文件第5页浏览型号CS4340A-KSZ的Datasheet PDF文件第7页浏览型号CS4340A-KSZ的Datasheet PDF文件第8页浏览型号CS4340A-KSZ的Datasheet PDF文件第9页 
CS4340A  
3. APPLICATIONS  
3.1 Upgrading from the CS4340 to the CS4340A  
The CS4340A is pin and functionally compatible with all CS4340 designs, operating at the standard audio  
sample rates, that use pin 3 as a serial clock input. In addition to the features of the CS4340, the CS4340A  
supports standard sample rates up to 192 kHz, as well as automatic mode detection for sample rates be-  
tween 4 and 200 kHz. The automatic mode detection feature allows sample rate changes between single,  
double and quad-speed modes without external intervention.  
The CS4340A does not support an internal serial clock mode, sample rates between 50 kHz and 84 kHz,  
de-emphasis for 32 and 48 kHz, or 2.7 V operation as does the CS4340.  
3.2  
Sample Rate Range/Operational Mode Detect  
The device operates in one of three operational modes. It will auto-detect the correct mode when the input  
sample rate (F ), defined by the LRCK frequency, falls within one of the ranges illustrated in Table 1. Sam-  
s
ple rates outside the specified range for each mode are not supported.  
Input Sample Rate (F )  
MODE  
S
4 kHz - 50 kHz  
84 kHz - 100 kHz  
170 kHz - 200 kHz  
Single-Speed Mode  
Double-Speed Mode  
Quad-Speed Mode  
Table 1. CS4340A Auto-Detect  
3.3  
System Clocking  
The device requires external generation of the master (MCLK), left/right (LRCK) and serial (SCLK)  
clocks. The LRCK, defined also as the input sample rate (F ), must be synchronously derived from the  
s
MCLK according to specified ratios. The specified ratios of MCLK to LRCK, along with several standard  
audio sample rates and the required MCLK frequency, are illustrated in Tables 2-4.  
6
DS590F2  

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