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CL7256AETC100-5 PDF预览

CL7256AETC100-5

更新时间: 2024-01-25 21:01:59
品牌 Logo 应用领域
其他 - ETC 可编程逻辑器件
页数 文件大小 规格书
16页 178K
描述
Electrically-Erasable Complex PLD

CL7256AETC100-5 技术参数

生命周期:Obsolete包装说明:QFP, TQFP100,.63SQ
Reach Compliance Code:unknown风险等级:5.84
Is Samacsys:N其他特性:YES
系统内可编程:YESJESD-30 代码:S-PQFP-G100
JTAG BST:YES宏单元数:256
端子数量:100最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:QFP封装等效代码:TQFP100,.63SQ
封装形状:SQUARE封装形式:FLATPACK
电源:3.3 V可编程逻辑类型:EE PLD
传播延迟:5 ns认证状态:Not Qualified
子类别:Programmable Logic Devices标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
Base Number Matches:1

CL7256AETC100-5 数据手册

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CL7256A  
CL7256AE  
Laser Processed Logic Device Family  
Key Features  
u Laser Processed Logic Device (LPLD™) technology offers  
the ultimate combination of performance, flexibility, and  
low cost  
u Functionally, architecturally, and electrically compatible  
with industry-standard Altera® MAX® 7000  
u High Density  
-
-
-
5,000 Usable gates  
256 Macrocells  
164 Maximum user I/O pins  
u Laser fuse technology provides very fast, dense  
interconnect routing  
u Low current consumption  
u Supports 3.3 volt operation  
u Alpha particle immune  
CL7000 Product Family Overview  
CL7128A  
Feature  
CL7256A  
CL7256AE  
5,000  
CL7512A  
CL7128AE  
Useable Gates  
Macrocells  
2,500  
10,000  
512  
128  
256  
Logic array Blocks  
Max user I/O pins  
Speed Grades  
8
100  
16  
164  
32  
212  
-4, -5, -6, -7, -10, -12  
-4, -5, -6, -7, -10, -12  
-6, -7, -10, -12  
84-Pin PLCC  
100-Pin TQFP  
100-Pin TQFP  
100-Pin BGA  
144-Pin TQFP  
208-Pin PQFP  
Packages  
100-Pin BGA  
144-Pin TQFP  
144-Pin TQFP  
256-Pin BGA  
208-Pin PQFP  
256-Pin BGA  
7KA tbl 01A  
December 2000  
Page 1