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CDP1857C

更新时间： 2024-01-26 13:03:48
品牌 Logo 应用领域
英特矽尔 - INTERSIL /
页数 文件大小 规格书
4页 28K
描述
4-Bit Bus Buffer/Separator

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CDP1857C 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：DIP, DIP16,.3Reach Compliance Code：unknown
风险等级：5.92JESD-30 代码：R-PDIP-T16
JESD-609代码：e0端子数量：16
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：DIP
封装等效代码：DIP16,.3封装形状：RECTANGULAR
封装形式：IN-LINE电源：5 V
子类别：Bus Driver/Transceivers标称供电电压 (Vsup)：5 V
表面贴装：NO技术：CMOS
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUALBase Number Matches：1

CDP1857C 数据手册

 浏览型号CDP1857C的Datasheet PDF文件第2页浏览型号CDP1857C的Datasheet PDF文件第3页浏览型号CDP1857C的Datasheet PDF文件第4页 
CDP1857C  
4-Bit Bus Buffer/Separator  
March 1997  
Features  
Description  
The CDP1857C is a 4-bit CMOS non-inverting bus separator  
designed for use in CDP1800-series microprocessor systems. It can  
be controlled directly by a 1800-series microprocessor without the  
use of additional components.  
• Provides Easy Connection of I/O to CDP1800-Series  
Microprocessor Data Bus  
• Non-Inverting Fully Buffered Data Transfer  
Ordering Information  
PART  
The CDP1857 is designed for use as a bus buffer or separator  
between the 1800-series microprocessor data bus and I/O devices.  
It provides a chip-select (CS) input signal which, when high (1),  
enables the bus-separator three-state output drivers. The direction  
of data flow, when enabled, is controlled by the MRD input signal.  
NUMBER  
CDP1857CE  
CDP1857CD  
TEMP. RANGE  
PACKAGE  
PKG. NO.  
E16.3  
o
o
-40 C to +85 C PDIP  
In the CDP1857, when MRD = 1, it enables the three-state bus drivers  
(DB0-DB3) and transfers data from the DATA-IN lines onto the data  
bus. When MRD = 0, it disables the three-state bus drivers (DB0-  
DB3) and enables the three-state data output drivers (DO0-DO3),  
thus, transferring data from the data bus to the DATA-OUT terminals.  
o
o
-40 C to +85 C SBDIP  
D16.3  
TABLE 1. CDP1857 FUNCTION FOR I/O BUS SEPARATOR  
OPERATION  
The CDP1857 can be used as a bidirectional bus buffer by connecting  
the corresponding DI and DO terminals (Figure 1). The MRD output  
signal from the 1800-series microprocessor has the correct polarity to  
control the CDP1857 when it is used as I/O bus buffer/separator.  
Therefore, the 1800-series microprocessor MRD signal can be  
connected directly to the MRD input of CDP1857. See Function Table  
1 for use of the CDP1857 as an I/O bus buffer/separator.  
DATA BUS OUT  
DB0-DB3  
DATA OUT  
DO0-DO3  
CS  
0
MRD  
X
0
1
High Impedance  
High Impedance  
Data In  
High Impedance  
Data Bus  
1
1
High Impedance  
The CDP1857C is supplied in 16-lead hermetic, dual-in-line ceramic  
packages (D suffix), and in 16-lead plastic packages (E suffix).  
Pinout  
Functional Diagram For CDP1857  
16 LEAD DIP  
TOP VIEW  
1
DI0  
14  
DB0  
DI0  
DI1  
1
2
3
4
5
6
7
8
16 V  
DD  
3
DO0  
15 CS  
DO0  
DO1  
DO2  
DO3  
DI2  
14 DB0  
13 DB1  
12 DB2  
11 DB3  
10 MRD  
2
DI1  
13  
DB1  
4
DO1  
7
DI2  
12  
9
DI3  
V
SS  
DB2  
5
DO2  
9
DI3  
11  
DB3  
6
DO3  
15  
CS  
10  
16 = V  
DD  
8 = V  
MRD  
SS  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
File Number 1192.2  
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999  
4-62  
1234

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