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CDC204-7DWR PDF预览

CDC204-7DWR

更新时间: 2024-01-09 10:48:23
品牌 Logo 应用领域
德州仪器 - TI 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
8页 123K
描述
6-Bit Inverter / Clock Driver 20-SOIC

CDC204-7DWR 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete包装说明:SOP, SOP20,.4
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.92JESD-30 代码:R-PDSO-G20
负载电容(CL):50 pF逻辑集成电路类型:INVERTER
最大I(ol):0.024 A端子数量:20
最高工作温度:70 °C最低工作温度:25 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP20,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
Prop。Delay @ Nom-Sup:5.7 ns认证状态:Not Qualified
施密特触发器:NO子类别:Gates
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:OTHER
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
Base Number Matches:1

CDC204-7DWR 数据手册

 浏览型号CDC204-7DWR的Datasheet PDF文件第2页浏览型号CDC204-7DWR的Datasheet PDF文件第3页浏览型号CDC204-7DWR的Datasheet PDF文件第4页浏览型号CDC204-7DWR的Datasheet PDF文件第5页浏览型号CDC204-7DWR的Datasheet PDF文件第6页浏览型号CDC204-7DWR的Datasheet PDF文件第7页 
CDC204  
HEX INVERTER/CLOCK DRIVER  
SCAS098E – OCTOBER 1989– REVISED OCTOBER 1998  
DW PACKAGE  
(TOP VIEW)  
CDC204 Replaces 74AC11204  
Low-Skew Propagation Delay  
Specifications for Clock-Driver Applications  
1Y  
2Y  
3Y  
GND  
GND  
GND  
GND  
4Y  
1A  
2A  
3A  
NC  
V
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
CMOS-Compatible Inputs and Outputs  
Flow-Through Architecture Optimizes  
PCB Layout  
Center-Pin V  
and GND Pin  
CC  
CC  
V
Configurations Minimize High-Speed  
Switching Noise  
CC  
NC  
4A  
5A  
6A  
EPIC (Enhanced-Performance Implanted  
CMOS) 1-µm Process  
5Y  
6Y  
500-mA Typical Latch-Up Immunity at  
125°C  
NC – No internal connection  
Package Options Include Plastic  
Small-Outline Package (DW))  
description  
The CDC204 contains six independent inverters. The device performs the Boolean function Y = A. It is designed  
specifically for applications requiring low skew between switching outputs.  
The CDC204 is characterized for operation from T = 25°C to 70°C.  
A
FUNCTION TABLE  
INPUT  
A
OUTPUT  
Y
H
L
L
H
logic symbol  
logic diagram (positive logic)  
20  
1A  
1
2
20  
1
2
1
1Y  
2Y  
3Y  
4Y  
5Y  
6Y  
1A  
1Y  
2Y  
3Y  
4Y  
5Y  
6Y  
19  
2A  
18  
3
19  
3A  
2A  
13  
8
4A  
12  
9
5A  
18  
3
3A  
11  
10  
6A  
13  
8
4A  
This symbol is in accordance with ANSI/IEEE Std 91-1984  
and IEC Publication 617-12.  
12  
9
5A  
11  
10  
6A  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 1998, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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