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CAT9555WI-T1 PDF预览

CAT9555WI-T1

更新时间: 2024-02-21 20:19:58
品牌 Logo 应用领域
CATALYST 并行IO端口微控制器和处理器外围集成电路光电二极管PC
页数 文件大小 规格书
17页 213K
描述
16-bit I2C and SMBus I/O Port with Interrupt

CAT9555WI-T1 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP24,.4针数:24
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.19
Samacsys Confidence:3Samacsys Status:Released
2D Presentation:https://componentsearchengine.com/2D/0T/229596.1.1.pngSchematic Symbol:https://componentsearchengine.com/symbol.php?partID=229596
PCB Footprint:https://componentsearchengine.com/footprint.php?partID=2295963D View:https://componentsearchengine.com/viewer/3D.php?partID=229596
Samacsys PartID:229596Samacsys Image:https://componentsearchengine.com/Images/9/CAT9555WI-T1.jpg
Samacsys Thumbnail Image:https://componentsearchengine.com/Thumbnails/1/CAT9555WI-T1.jpgSamacsys Pin Count:24
Samacsys Part Category:Integrated CircuitSamacsys Package Category:Small Outline Packages
Samacsys Footprint Name:SOIC-24 CASE751BKSamacsys Released Date:2015-10-27 14:32:43
Is Samacsys:NJESD-30 代码:R-PDSO-G24
JESD-609代码:e3长度:15.3 mm
湿度敏感等级:3位数:16
I/O 线路数量:16端口数量:2
端子数量:24最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP24,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:2.5/5 V
认证状态:Not Qualified座面最大高度:2.65 mm
子类别:Parallel IO Port最大供电电压:5.5 V
最小供电电压:2.3 V标称供电电压:3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.47 mmuPs/uCs/外围集成电路类型:PARALLEL IO PORT, GENERAL PURPOSE
Base Number Matches:1

CAT9555WI-T1 数据手册

 浏览型号CAT9555WI-T1的Datasheet PDF文件第11页浏览型号CAT9555WI-T1的Datasheet PDF文件第12页浏览型号CAT9555WI-T1的Datasheet PDF文件第13页浏览型号CAT9555WI-T1的Datasheet PDF文件第14页浏览型号CAT9555WI-T1的Datasheet PDF文件第15页浏览型号CAT9555WI-T1的Datasheet PDF文件第16页 
REVISION HISTORY  
Date  
Rev.  
A
Reason  
12/9/2004  
1/7/2005  
03/11/05  
Advance Information - Initial Issue  
Advance Information - Minor changes  
B
C
Advance Information -  
Edit Features  
Edit Ordering Information  
09/25/06  
03/12/07  
D
E
Initial Release  
Update Ordering Information: Tape and Reel for SOIC package  
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Catalyst Semiconductor has been issued U.S. and foreign patents and has patent applications pending that protect its products.  
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USE OR APPLICATION AND SPECIFICALLY DISCLAIMS ANY AND ALL LIABILITY ARISING OUT OF ANY SUCH USE OR  
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Catalyst Semiconductor reserves the right to make changes to or discontinue any product or service described herein without notice.  
Products with data sheets labeled "Advance Information" or "Preliminary" and other products described herein may not be in production or  
offered for sale.  
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diagrams illustrate typical semiconductor applications and may not be complete.  
Catalyst Semiconductor, Inc.  
Corporate Headquarters  
2975 Stender Way  
Santa Clara, CA 95054  
Publication #: 8551  
Phone: 408.542.1000  
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www.catsemi.com  
Revison:  
E
Issue date:  
03/12/07  

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