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CAT9555YI-T1

更新时间: 2022-04-23 23:00:11
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CATALYST /
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17页 213K
描述
16-bit I2C and SMBus I/O Port with Interrupt

CAT9555YI-T1 数据手册

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CAT9555  
16-bit I2C and SMBus I/O Port with Interrupt  
FEATURES  
DESCRIPTION  
400kHz I2C bus compatible*  
2.3V to 5.5V operation  
The CAT9555 is a CMOS device that provides 16-bit  
parallel input/output port expansion for I2C and SMBus  
compatible applications. These I/O expanders provide  
a simple solution in applications where additional I/Os  
are needed: sensors, power switches, LEDs,  
pushbuttons, and fans.  
Low stand-by current  
5V tolerant I/Os  
16 I/O pins that default to inputs at power-up  
High drive capability  
The CAT9555 consists of two 8-bit Configuration ports  
(input or output), Input, Output and Polarity inversion  
registers,andanI2C/SMBus-compatibleserialinterface.  
Individual I/O configuration  
Polarity inversion register  
Active low interrupt output  
Internal power-on reset  
Any of the sixteen I/Os can be configured as an input or  
outputbywritingtotheconfigurationregister.Thesystem  
master can invert the CAT9555 input data by writing to  
the active-high polarity inversion register.  
No glitch on power-up  
Noise filter on SDA/SCL inputs  
Cascadable up to 8 devices  
Industrial temperature range  
The CAT9555 features an active low interrupt output  
which indicates to the system master that an input state  
has changed.  
The three address input pins provide the device's  
extended addressing capability and allow up to eight  
devices to share the same bus. The fixed part of the I2C  
slave address is the same as the CAT9554, allowing up  
to eight of these devices in any combination to be  
connected on the same bus.  
RoHS-compliant 24-lead SOIC and TSSOP, and  
24-pad TQFN (4 x 4 mm) packages  
APPLICATIONS  
White goods (dishwashers, washing machines)  
Handheld devices (cell phones, PDAs, digital  
cameras)  
Data Communications (routers, hubs and  
For Ordering Information details, see page 16.  
servers)  
BLOCK DIAGRAM  
A0  
A1  
A2  
I/O1.0  
I/O1.1  
I/O1.2  
INPUT/  
8-BIT  
I/O1.3  
I/O1.4  
I/O1.5  
I/O1.6  
I/O1.7  
OUTPUT  
PORTS  
WRITE pulse  
READ pulse  
2
I
C/SMBUS  
CONTROL  
I/O0.0  
I/O0.1  
I/O0.2  
I/O0.3  
I/O0.4  
I/O0.5  
I/O0.6  
I/O0.7  
SCL  
INPUT  
FILTER  
INPUT/  
OUTPUT  
PORTS  
8-BIT  
SDA  
WRITE pulse  
READ pulse  
V
CC  
V
INT  
POWER-ON  
RESET  
V
CC  
LP FILTER  
INT  
~
NOTE: ALL I/Os ARE SET TO INPUTS AT RESET  
2
* Catalyst Semiconductor is licensed by Philips Corporation to carry the I C Bus Protocol.  
© 2007 by Catalyst Semiconductor, Inc.  
Characteristics subject to change without notice  
Doc. No. 8551, Rev. E  
1

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