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CAT1163WI-30-GT3 PDF预览

CAT1163WI-30-GT3

更新时间: 2024-02-15 00:57:49
品牌 Logo 应用领域
安森美 - ONSEMI 微控制器和处理器外围集成电路uCs集成电路uPs集成电路光电二极管监控可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
14页 217K
描述
Supervisory Circuits with I2C Serial CMOS EEPROM, Precision Reset Controller and Watchdog Timer (16K)

CAT1163WI-30-GT3 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:8
Reach Compliance Code:compliantHTS代码:8542.31.00.01
Factory Lead Time:1 week风险等级:5
Is Samacsys:NJESD-30 代码:R-PDSO-G8
JESD-609代码:e4长度:4.9 mm
湿度敏感等级:1端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED认证状态:Not Qualified
座面最大高度:1.75 mm最大供电电压:6 V
最小供电电压:2.7 V标称供电电压:3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.9 mmuPs/uCs/外围集成电路类型:MICROPROCESSOR CIRCUIT
Base Number Matches:1

CAT1163WI-30-GT3 数据手册

 浏览型号CAT1163WI-30-GT3的Datasheet PDF文件第1页浏览型号CAT1163WI-30-GT3的Datasheet PDF文件第3页浏览型号CAT1163WI-30-GT3的Datasheet PDF文件第4页浏览型号CAT1163WI-30-GT3的Datasheet PDF文件第5页浏览型号CAT1163WI-30-GT3的Datasheet PDF文件第6页浏览型号CAT1163WI-30-GT3的Datasheet PDF文件第7页 
CAT1163  
RESET THRESHOLD OPTION  
BLOCK DIAGRAM  
Part Dash  
Number  
Minimum  
Threshold  
Maximum  
Threshold  
-45  
-42  
-30  
-28  
-25  
4.50  
4.25  
3.00  
2.85  
2.55  
4.75  
4.50  
3.15  
3.00  
2.70  
ABSOLUTE MAXIMUM RATINGS(1)  
Parameters  
Ratings  
–55 to +125  
–65 to +150  
–2.0 to VCC + 2.0  
–2.0 to + 7.0  
1.0  
Units  
ºC  
ºC  
V
Temperature Under Bias  
Storage Temperature  
Voltage on any Pin with Respect to Ground(2)  
VCC with Respect to Ground  
V
Package Power Dissipation Capability (TA = 25°C)  
Lead Soldering Temperature (10 seconds)  
Output Short Circuit Current(3)  
W
300  
ºC  
mA  
100  
REABILITY CHARACTERISTICS  
Symbol  
Parameter  
Reference Test Method  
Min  
Max  
Units  
Cycles/Byte  
Years  
(4)  
NEND  
Endurance  
MIL-STD-883, Test Method 1033  
MIL-STD-883, Test Method 1008  
MIL-STD-883, Test Method 3015  
JEDEC Standard 17  
1,000,000  
100  
(4)  
TDR  
Data Retention  
ESD Susceptibility  
Latch-up  
(4)  
VZAP  
2000  
Volts  
(4)(5)  
ILTH  
100  
mA  
Notes:  
(1) Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings  
only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this  
specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability.  
(2) The minimum DC input voltage is –0.5V. During transitions, inputs may undershoot to –2.0V for periods of less than 20ns. Maximum DC  
voltage on output pins is VCC +0.5V, which may overshoot to VCC +2.0V for periods of less than 20 ns.  
(3) Output shorted for no more than one second. No more than one output shorted at a time.  
(4) This parameter is tested initially and after a design or process change that affects the parameter.  
(5) Latch-up protection is provided for stresses up to 100mA on address and data pins from –1V to VCC +1V.  
Doc. No. MD-3003 Rev. I  
2
© 2009 SCILLC. All rights reserved.  
Characteristics subject to change without notice  

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