Datasheet > C1005X7R1C103K

C1005X7R1C103K

更新时间： 2024-09-30 07:18:43

品牌	Logo	应用领域
亚德诺 - ADI		电池
页数	文件大小	规格书
44页	637K
描述
Tiny I2C Programmable Linear Battery Charger

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C1005X7R1C103K 数据手册

Tiny I²C Programmable Linear Battery Charger

with Power Path and USB Mode Compatibility

Data Sheet

ADP5061

FEATURES

TYPICAL APPLICATION CIRCUIT

2.6 mm × 2 mm WLCSP package

ADP5061

SYSTEM

Fully programmable via I²C

ISO_S

VBUS

VIN

AC OR

USB

CBP

47µF

Flexible digital control inputs

10µF

10nF

Up to 2.1 A current from an ac charger in LDO mode

Operating input voltage from 4.0 V to 6.7 V

Tolerant input voltage from −0.5 V to +20 V (USB VBUS)

Fully compatible with USB 3.0 and USB Battery Charging

Specification 1.2

SCL

SDA

ISO_B

CHARGER

CONTROL

BLOCK

22µF

BAT_SNS

DIG_IO1

DIG_IO2

DIG_IO3

Li-ion

THR

Built-in current sensing and limiting

SYS_EN

As low as 30 mΩ battery isolation FET between battery and

charger output

ILED

VLED

AGND

Thermal regulation prevents over heating

Compliant with JEITA 1 and JEITA 2 Li-Ion battery charging

temperature specifications

Figure 1.

SYS_EN flag permits the system to be disabled until battery is at

minimum required level for guaranteed system start-up

APPLICATIONS

Digital still cameras

Digital video cameras

Single cell Li-Ion portable equipment

PDAs, audio, and GPS devices

Portable medical devices

Mobile phones

GENERAL DESCRIPTION

scenario, which allows for immediate system function on connec-

tion to a USB power supply.

The ADP5061 charger is fully compliant with USB 3.0 and the

USB Battery Charging Specification 1.2 and enables charging

via the mini USB VBUS pin from a wall charger, car charger, or

USB host port.

Based on the type of USB source, which is detected by an external

USB detection chip, the ADP5061 can be set to apply the correct

current limit for optimal charging and USB compliance.

The ADP5061 operates from a 4 V to 6.7 V input voltage range

but is tolerant of voltages up to 20 V. The 20 V voltage tolerance

alleviates the concerns about the USB bus spiking during dis-

connect or connect scenarios.

The ADP5061 has three factory programmable digital input/output

pins that provide maximum flexibility for different systems.

These digital input/output pins permit combinations of features

such as, input current limits, charging enable and disable,

charging current limits, and a dedicated interrupt output pin.

The ADP5061 features an internal FET between the linear

charger output and the battery. This permits battery isolation

and, hence, system powering under a dead battery or no battery

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rightsof third parties that may result fromits use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks andregisteredtrademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

www.analog.com

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与C1005X7R1C103K相关器件

型号	品牌	获取价格	描述	数据表
C1005X7R1C103K/50	TDK	获取价格	CAP CER 10000PF 16V X7R 0402
C1005X7R1C103K050BA	TDK	获取价格	Multilayer Ceramic Chip Capacitors
C1005X7R1C103M	TDK	获取价格	CAP CER 10000PF 16V X7R 0402
C1005X7R1C104K	TDK	获取价格	2012 MLCC PRODUCT GUIDE
C1005X7R1C104K(050BC)	TDK	获取价格	CAPACITOR, CERAMIC, MULTILAYER, 16 V, X7R, 0.1 uF, SURFACE MOUNT, 0402, CHIP, ROHS COMPLIA
C1005X7R1C104K050BC	TDK	获取价格	All specifications are subject to change without notice.
C1005X7R1C104K050BC_16	TDK	获取价格	Multilayer Ceramic Chip Capacitors
C1005X7R1C104K050BC_17	TDK	获取价格	Multilayer Ceramic Chip Capacitors
C1005X7R1C104KB	TDK	获取价格	Ceramic Capacitor, Multilayer, Ceramic, 16V, 10% +Tol, 10% -Tol, X7R, 15% TC, 0.1uF, Surfa
C1005X7R1C104KT	TDK	获取价格	Ceramic Capacitor, Multilayer, Ceramic, 16V, 10% +Tol, 10% -Tol, X7R, 15% TC, 0.1uF, Surfa

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