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C0805C103M5RACTU

更新时间: 2024-01-18 01:52:15
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
14页 332K
描述
ISO5500EVM

C0805C103M5RACTU 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active包装说明:, 0805
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8532.24.00.20风险等级:5.65
电容:0.01 µF电容器类型:CERAMIC CAPACITOR
介电材料:CERAMICJESD-609代码:e3
安装特点:SURFACE MOUNT多层:Yes
负容差:20%端子数量:2
最高工作温度:85 °C最低工作温度:-30 °C
封装形状:RECTANGULAR PACKAGE包装方法:TR, PUNCHED PAPER, 13 INCH
正容差:20%额定(直流)电压(URdc):50 V
尺寸代码:0805表面贴装:YES
温度特性代码:Y5V温度系数:-82/+22% ppm/ °C
端子面层:Matte Tin (Sn) - with Nickel (Ni) barrier端子形状:WRAPAROUND
Base Number Matches:1

C0805C103M5RACTU 数据手册

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User's Guide  
SLLU136September 2011  
ISO5500EVM  
This document describes the ISO5500 Evaluation Module (EVM) and allows designers to analyze and  
evaluate the Texas Instruments ISO5500 Isolated Gate Driver.  
The ISO5500EVM can be used to evaluate device parameters while acting as a guide for board layout.  
The board allows the user to evaluate device performance using a simulated (10-nF) IGBT load installed  
on the board, or to install an IGBT or MOSFET (TO-247 package) onto the board and drive it with the  
ISO5500.  
Contents  
1
2
Introduction .................................................................................................................. 1  
1.1  
1.2  
Overview ............................................................................................................ 1  
ISO5500EVM Kit Contents ....................................................................................... 2  
Printed-Circuit Board ....................................................................................................... 2  
2.1  
2.2  
ISO5500 Operation ................................................................................................ 2  
Schematic and Bill of Materials .................................................................................. 5  
List of Figures  
1
2
3
4
ISO5500 Pinout and Functional Block Diagram ........................................................................  
High-Side Interconnection Diagram ......................................................................................  
Low-Side Interconnection Diagram .......................................................................................  
Component Changes to Change Turnon/Turnoff .......................................................................  
2
4
4
5
List of Tables  
1
2
Test Points...................................................................................................................  
Bill of Materials ..............................................................................................................  
5
6
1
Introduction  
1.1 Overview  
This ISO5500EVM was designed to allow the user to evaluate the performance and features of the  
ISO5500. This includes the IGBT desaturation protection (DESAT) and the UVLO circuit that ensures a  
sufficient gate voltage is available to drive the IGBT or MOSFET. The printed-circuit board (PCB) also  
includes provisions to adjust the turnon/turnoff characteristics by changing the loading between the  
ISO5500 output and the IGBT (or MOSFET) gate.  
The EVM kit includes the ISO5500 data sheet. Figure 1 shows the device pinout and the functional block  
diagram.  
QuietZone is a trademark of 3M.  
1
SLLU136September 2011  
ISO5500EVM  
Submit Documentation Feedback  
Copyright © 2011, Texas Instruments Incorporated  
 
 

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