Datasheet > BU9750FUV-E2

BU9750FUV-E2

更新时间： 2022-03-30 09:37:28

品牌	Logo	应用领域
罗姆 - ROHM		驱动器
页数	文件大小	规格书
15页	406K
描述
Standard Segment Drivers

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BU9750FUV-E2 数据手册

Technical Note

BU9795AKV,BU9795AFV,BU9795AGUW,BU9794AKV,BU97950FUV

DC Characteristics (VDD=2.5~5.5V, VLCD=2.5~5.5V, VSS=0V, Ta=-40~85℃, unless otherwise specified)

Limits

Parameter

Symbol

Unit

Conditions

Min.

Typ.

Max.

“H” level input voltage

“L” level input voltage

“H” level input current

“L” level input current

VIH

VIL

IIH

0.7VDD

VDD

SDA,SCL

VSS

0.3VDD

-1

µA

kΩ

µA

IIL

SEG

COM

RON

Ist

3.5

LCD Driver on

resistance

Iload=±10µA

Standby current

Display off, Oscillation off

VDD=3.3V, VLCD=5V, Ta=25℃

Power save mode1, FR=80Hz

1/4 bias, Frame inverse

VDD=3.3V, VLCD=5V, Ta=25℃

Power save mode1, FR=80Hz

1/4 bias, Frame inverse

Power consumption 1

Power consumption 2

IDD

2.5

µA

ILCD

Oscillation Characteristics (VDD=2.5~5.5V, VSS=0V, Ta=-40~85℃, unless otherwise specified)

Limits

Parameter

Symbol

fCLK

Unit

Condition

Min.

Typ.

Max.

104

Power save mode

FR = Normal mode

Frame frequency

MPU interface Characteristics (VDD=2.5~5.5V, VLCD=0V, VSS=0V, Ta=-40~85℃, unless otherwise specified)

Limits

Parameter

Symbol

Unit

Condition

Min.

Typ.

Max.

Input rise time

0.3

µs

Input fall time

0.3

SCL cycle time

tSCYC

tSHW

tSLW

tSDS

tSDH

tBUF

tHD;STA

2.5

0.6

1.3

200

“H” SCL pulse width

“L” SCL pulse width

SDA setup time

SDA hold time

Bus free time

1.3

0.6

START condition hold time

START condition setup time tSU;STA

STOP condition setup time

tSU;STO

SDA

tSCYC

tSLW

tBUF

SCL

tHD;STA

tSHW

tSDS

tSDH

SDA

tSU;STO

tSU;STA

Fig.3 interface timing (BU97950FUV)

5/14

www.rohm.com

2011.03 - Rev.A

1 2 3 456 7 8...15

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