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BS62LV2000SCP70 PDF预览

BS62LV2000SCP70

更新时间: 2024-02-17 16:10:40
品牌 Logo 应用领域
BSI 静态存储器光电二极管内存集成电路
页数 文件大小 规格书
9页 324K
描述
Standard SRAM, 256KX8, 70ns, CMOS, PDSO32

BS62LV2000SCP70 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:SOP, SOP32,.56Reach Compliance Code:unknown
风险等级:5.84最长访问时间:70 ns
I/O 类型:COMMONJESD-30 代码:R-PDSO-G32
内存密度:2097152 bit内存集成电路类型:STANDARD SRAM
内存宽度:8湿度敏感等级:3
端子数量:32字数:262144 words
字数代码:256000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:256KX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP32,.56封装形状:RECTANGULAR
封装形式:SMALL OUTLINE并行/串行:PARALLEL
电源:3/5 V认证状态:Not Qualified
最大待机电流:0.000001 A最小待机电流:1.5 V
子类别:SRAMs最大压摆率:0.04 mA
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL

BS62LV2000SCP70 数据手册

 浏览型号BS62LV2000SCP70的Datasheet PDF文件第2页浏览型号BS62LV2000SCP70的Datasheet PDF文件第3页浏览型号BS62LV2000SCP70的Datasheet PDF文件第4页浏览型号BS62LV2000SCP70的Datasheet PDF文件第5页浏览型号BS62LV2000SCP70的Datasheet PDF文件第6页浏览型号BS62LV2000SCP70的Datasheet PDF文件第7页 
Very Low Power/Voltage CMOS SRAM  
256K X 8 bit  
BSI  
BS62LV2000  
„ DESCRIPTION  
„ FEATURES  
The BS62LV2000 is a high performance , very low power CMOS  
Static Random Access Memory organized as 262,144 words by 8 bits  
and operates from a wide range of 2.7V to 5.5V supply voltage.  
Advanced CMOS technology and circuit techniques provide both high  
speed and low power features with a typical CMOS standby current of  
0.15uA and maximum access time of 70ns in 3V operation.  
Easy memory expansion is provided by an active LOW chip  
enable (CE1), an active HIGH chip enable (CE2), and active LOW  
output enable (OE) and three-state output drivers.  
• Wide Vcc operation voltage : 2.7V ~ 5.5V  
• Very low power consumption :  
Vcc = 3.0V C-grade : 20mA (Max.) operating current  
I- grade : 25mA (Max.) operating current  
0.15uA (Typ.) CMOS standby current  
Vcc = 5.0V C-grade : 40mA (Max.) operating current  
I- grade : 45mA (Max.) operating current  
3uA (Typ.) CMOS standby current  
• High speed access time :  
The BS62LV2000 has an automatic power down feature , reducing the  
power consumption significantly when chip is deselected.  
-70  
-10  
70ns(Max.) at Vcc = 3.0V  
100ns(Max.) at Vcc = 3.0V  
The BS62LV2000 is available in the JEDEC standard 32 pin 450mil  
Plastic SOP, 8mmx13.4mm STSOP and 8mmx20mm TSOP.  
• Automatic power down when chip is deselected  
• Three state outputs and TTL compatible  
• Fully static operation  
• Data retention supply voltage as low as 1.5V  
• Easy expansion with CE2, CE1, and OE options  
• All I/O pins are 3V/5V tolerant  
„ PRODUCT FAMILY  
POWER DISSIPATION  
SPEED  
(ns)  
STANDBY  
(I , Max)  
Operating  
, Max)  
PRODUCT  
FAMILY  
OPERATING  
Vcc  
PKG TYPE  
CCSB1  
CC  
(I  
TEMPERATURE  
RANGE  
Vcc=3V  
Vcc=5V Vcc=3V Vcc=5V Vcc=3V  
BS62LV2000TC  
BS62LV2000STC  
BS62LV2000SC  
BS62LV2000TI  
BS62LV2000STI  
BS62LV2000SI  
TSOP 32  
-
OC  
OC to +70  
2.7V ~ 5.5V 70 / 100  
10uA  
20uA  
3uA  
5uA  
40mA  
45mA  
20mA  
25mA  
+0  
STSOP 32  
-
SOP 32  
-
TSOP 32  
-
O
O
-
40 C to +85 C 2.7V ~ 5.5V 70 / 100  
STSOP 32  
-
SOP 32  
-
„ BLOCK DIAGRAM  
„ PIN CONFIGURATIONS  
1
A11  
A9  
OE  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
2
A10  
CE1  
DQ7  
DQ6  
DQ5  
DQ4  
DQ3  
GND  
DQ2  
DQ1  
DQ0  
A0  
3
A8  
A13  
A17  
4
5
6
7
8
9
10  
11  
12  
13  
14  
15  
16  
A13  
WE  
CE2  
A15  
VCC  
A17  
A16  
A14  
A12  
A7  
A15  
A16  
A14  
Address  
Memory Array  
1024 x 2048  
20  
1024  
BS62LV2000TC  
BS62LV2000STC  
BS62LV2000TI  
BS62LV2000STI  
Row  
Input  
A12  
A7  
A6  
A5  
A4  
Decoder  
Buffer  
A6  
A5  
A4  
A1  
A2  
A3  
2048  
DQ0  
DQ1  
DQ2  
DQ3  
DQ4  
DQ5  
DQ6  
DQ7  
8
Data  
Input  
8
Column I/O  
Buffer  
Write Driver  
Sense Amp  
A17  
A16  
A14  
A12  
A7  
1
VCC  
A15  
CE2  
WE  
32  
31  
30  
29  
28  
27  
8
2
8
Data  
3
256  
Column Decoder  
16  
Output  
Buffer  
4
5
A13  
A8  
A6  
6
A5  
7
A9  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
BS62LV2001SC  
BS62LV2001SI  
A4  
8
A11  
OE  
CE1  
CE2  
A3  
9
Control  
Address Input Buffer  
A2  
10  
11  
12  
13  
14  
15  
16  
A10  
CE1  
DQ7  
DQ6  
DQ5  
DQ4  
DQ3  
WE  
OE  
A1  
A0  
Vdd  
Gnd  
DQ0  
DQ1  
DQ2  
GND  
A9 A8 A3 A2 A1 A0 A10  
A11  
Brilliance Semiconductor, Inc. reserves the right to modify document contents without notice.  
Revision 2.4  
Jan. 2004  
R0201-BS62LV2000  
1

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