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BS616LV2019AIP70 PDF预览

BS616LV2019AIP70

更新时间： 2024-01-24 09:19:52
品牌 Logo 应用领域
BSI 静态存储器
页数 文件大小 规格书
10页 283K
描述
Very Low Power/Voltage CMOS SRAM 128K X 16 bit

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BS616LV2019AIP70 数据手册

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Very Low Power/Voltage CMOS SRAM  
128K X 16 bit  
BSI  
BS616LV2019  
„ FEATURES  
• Easy expansion with CE and OE options  
• Vcc operation voltage range : 2.7V ~ 3.6V  
• Very low power consumption :  
• I/O Configuration x8/x16 selectable by LB and UB pin  
Vcc = 3.0V C-grade: 23mA (@55ns) operating current  
I -grade: 25mA (@55ns) operating current  
C-grade: 15mA (@70ns) operating current  
I -grade: 16mA (@70ns) operating current  
0.3uA(Typ.) CMOS standbycurrent  
„ DESCRIPTION  
The BS616LV2019 is a high performance , very low power CMOS Static  
Random Access Memory organized as 131,072 words by 16 bits and  
operates from a range of 2.7V to 3.6V supply voltage.  
Advanced CMOS technology and circuit techniques provide both high  
speed and low power features with a typical CMOS standby current of  
0.3uA at 3.0V/25oC and maximum access time of 55ns at 2.7V/85oC.  
Easy memory expansion is provided by active LOW chip enable (CE),  
active LOW output enable(OE) and three-state output drivers.  
The BS616LV2019 has an automatic power down feature, reducing the  
power consumption significantly when chip is deselected.  
• High speed access time :  
-55  
-70  
55ns  
70ns  
• Automatic power down when chip is deselected  
• Three state outputs and TTL compatible  
• Fully static operation  
• Data retention supply voltage as low as 1.5V  
The BS616LV2019 is available in DICE form , JEDEC standard 48-pin  
TSOP Type I package and 48-ball BGA package.  
„ PRODUCT FAMILY  
POWER DISSIPATION  
SPEED  
( ns )  
STANDBY  
Operating  
PRODUCT  
FAMILY  
OPERATING  
TEMPERATURE  
Vcc  
RANGE  
( ICCSB1, Max )  
( ICC, Max )  
PKG TYPE  
55ns: 2.7~3.6V  
70ns: 2.7~3.6V  
Vcc=3.0V  
Vcc=3.0V  
70ns  
55ns  
BS616LV2019DC  
BS616LV2019TC  
BS616LV2019AC  
BS616LV2019DI  
BS616LV2019TI  
BS616LV2019AI  
DICE  
+0 O C to +70O  
-40 O C to +85O  
C
C
2.7V ~3.6V  
2.7V ~ 3.6V  
55/70  
55/70  
15mA  
16mA  
3.0uA  
23mA  
TSOP1-48  
BGA-48-0608  
DICE  
TSOP1-48  
BGA-48-0608  
25mA  
5.0uA  
„ PIN CONFIGURATIONS  
„ BLOCK DIAGRAM  
A15  
1
48  
47  
46  
A16  
NC  
A14  
A13  
A12  
A11  
A10  
A9  
VSS  
IO15  
IO7  
A8  
A13  
IO14  
IO6  
A15  
Address  
A8  
IO13  
IO5  
20  
A16  
A14  
1024  
NC  
NC  
/WE  
CE2  
NC  
/UB  
/LB  
NC  
NC  
A7  
9
Input  
10  
IO12  
IO4  
Row  
Memory Array  
1024 x 2048  
A12  
A7  
37  
VCC  
IO11  
IO3  
BS616LV2019TC  
BS616LV2019TI  
Buffer  
13  
Decoder  
IO10  
IO2  
A6  
A5  
A4  
16  
17  
IO9  
IO1  
A6  
IO8  
2048  
A5  
IO0  
A4  
/OE  
VSS  
Data  
Input  
Buffer  
A3  
27  
25  
16  
16  
16  
Column I/O  
A2  
/CE  
A0  
DQ0  
A1  
24  
.
.
.
.
.
.
.
.
Write Driver  
Sense Amp  
1
2
3
4
5
6
128  
Data  
Output  
16  
A
B
C
D
E
F
LB  
D8  
OE  
UB  
A0  
A3  
A1  
A4  
A2  
N.C.  
D0  
Buffer  
Column Decoder  
DQ15  
CE  
D1  
D3  
14  
CE2,CE  
WE  
D9  
D10  
D11  
D12  
D13  
A5  
A6  
D2  
Control  
Address Input Buffer  
OE  
N.C.  
VSS  
VCC  
A7  
VCC  
VSS  
UB  
LB  
N.C.  
A14  
A12  
A9  
A16  
A15  
A13  
A10  
D4  
D5  
A11 A9 A3 A2 A1  
A0 A10  
D14  
D15  
N.C.  
D6  
D7  
Vcc  
Gnd  
WE  
A11  
G
H
N.C.  
A8  
N.C.  
48-ball BGA top view  
Brilliance Semiconductor, Inc. reserves the right to modify document contents without notice.  
Revision 1.2  
R0201-BS616LV2019  
1
May  
2004  
1234567...10

中文翻译

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