Datasheet > BD9892K-E2

BD9892K-E2

更新时间： 2024-02-23 11:33:39

品牌	Logo	应用领域
罗姆 - ROHM		/
页数	文件大小	规格书
5页	163K
描述
Analog Circuit, PQFP44,

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技术参数
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BD9892K-E2 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	包装说明：	QFP, QFP44,.57SQ,32
Reach Compliance Code：	compliant	HTS代码：	8542.39.00.01
风险等级：	5.58	控制模式：	VOLTAGE-MODE
JESD-30 代码：	S-PQFP-G44	JESD-609代码：	e3
湿度敏感等级：	1	端子数量：	44
最高工作温度：	90 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	QFP
封装等效代码：	QFP44,.57SQ,32	封装形状：	SQUARE
封装形式：	FLATPACK	峰值回流温度（摄氏度）：	225
认证状态：	Not Qualified	子类别：	Switching Regulator or Controllers
表面贴装：	YES	最大切换频率：	150 kHz
温度等级：	INDUSTRIAL	端子面层：	Matte Tin (Sn)
端子形式：	GULL WING	端子节距：	0.8 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	NOT SPECIFIED
Base Number Matches：	1

BD9892K-E2 数据手册

4/4

〇NOTE FOR USE

１． When designing the external circuit, including adequate margins for variation between external devices and the IC.Use

adequate margins for steady state and transient characteristics.

２． Recommended Operating Range

The circuit functionality is guaranteed within of ambient temperature operation range as long as it is within recommended

operating range. The standard electrical characteristic values cannot be guaranteed at other voltages in the operating

ranges, however, the variation will be small.

３． Mounting Failures

Mounting failures, such as misdirection or miscounts, may harm the device.

４． Electromagnetic Fields

A strong electromagnetic field may cause the IC to malfunction.

５. The GND pin should be the location within ±0.3V compared with the PGND(A,B) pin

６． BD9892K has the short circuit protection with Thermal Shut Down System. When STB or Vcc pin re-supplied, They enables

to cancel the latch. If It rise the temperature of the chip more than 170℃(TYP), It make the external FET OFF

７．Absolutemaximumratingsarethosevaluesthat,ifexceeded,maycausethelifeofadevicetobecomesignificantlyshortened.

Moreover, the exact failure mode caused by short or open is not defined. Physical countermeasures, such as a fuse, need

to be considered when using a device beyond its maximum ratings.

８． About the external FET, the parasitic Capacitor may cause the gate voltage to change, when the drain voltage is switching.

Make sure to leave adequate margin for this IC variation.

９． On operating Slow Start Control (SS(A,B) is less than 2.2V), It does not operate Timer Latch.

１０． By STB voltage, BD9892K is changed to 2 states. Therefore, do not input STB pin voltage between one state and the other

state (0.8～2.0).

１１．The pin connected a connector need to connect to the resistor for electrical surge destruction.

１２．This IC is a monolithic IC which (as shown is Fig-1)has P⁺substrate and between the various pins. A P-N junction is

formed from this P layer of each pin. For example, the relation between each potential is as follows,

○(When GND > PinB and GND > PinA, the P-N junction operates as a parasitic diode.)

○(When PinB > GND > PinA, the P-N junction operates as a parasitic transistor.)

Parasitic diodes can occur inevitably in the structure of the IC. The operation of parasitic diodes can result in mutual

interference among circuits as well as operation faults and physical damage. Accordingly you must not use methods by which

parasitic diodes operate, such as applying a voltage that is lower than the GND(P substrate)voltage to an input pin.

Transistor (NPN)

Resistance

(PinA)

(PinB)

Ｃ

GND

P^＋

Ｎ

P substrate

GND

Parasitic diode

P substrate

GND

Parasitic diode

(PinB)

(PinA)

Ｂ

Ｃ

Ｅ

Parasitic diode

GND

Other adjacent components

Parasitic diode

Fig.1 Simplified structure of a Bipolar IC

REV. B

1 2 345

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