Datasheet > BD34602FS-E2

BD34602FS-E2

更新时间： 2022-02-26 11:53:30

品牌	Logo	应用领域
罗姆 - ROHM		/
页数	文件大小	规格书
33页	1520K
描述
6ch Sound Processor for High-Quality Audio with Built-in Advanced Switch

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BD34602FS-E2 数据手册

Daattaasshheeeett

BD34602FS-M

CONTROL SIGNAL SPECIFICATION

(1) Electrical specifications and timing for bus lines and I/O stages

0.7VDD

=2.3V

0.3VDD

SDA

=1V

^tBUF

^tHD;STA

^tSP

^tLOW

SCL

^tSU;STO

^tHD;STA

^tSU;DAT ^tSU;STA

^tHD;DAT

^tHIGH

Repetition

START condition

STOP condition START condition

STOP condition

Figure 12. Definition of timing on the I²C-BUS

Table 1 Characteristics of the SDA and SCL bus lines for I²C-BUS devices

Item

Fast-mode I²C-BUS)

Symbol

Unit

Min

Max

400

kHz

SCL clock frequency

fSCL

tBUF

Bus free time between a STOP and START condition

1.3

－

μs

Hold time (repeated) START condition. After this period, the first clock

pulse is generated

tHD;STA

0.6

μs

LOW period of the SCL clock

tLOW

1.3

0.6

－

μs

HIGH period of the SCL clock

tHIGH

tSU;STA

Set-up time for a repeated START condition

Data hold time

tHD;DAT

tSU;DAT

tSU;STO

－

μs

Data set-up time

100

0.6

Set-up time for STOP condition

All values referred to VIH min. and VIL max. Levels (see Table 2).

Table 2 Input/Output Characteristics of the SDA and SCL terminal for I²C-BUS devices

Fast-mode I²C-BUS)

Item

Unit

Symbol

Min

-0.5

2.3

Max

10 LOW level input voltage

11 HIGH level input voltage

V_IL

V_IH

tSP

12 Pulse width of spikes which must be suppressed by the input filter.

13 LOW level output voltage : At 3mA sink current

V_OL1

0.4

Input current each I/O pin with an input voltage between 0.4V and 4.5

VDDmax.

-10

μA

Table 3 Input Characteristics of the CS terminal (Slave Address can be changed by the setting of CS terminal)

Item

CS = Low：Slave Address 80 hex

CS = High：Slave Address 84 hex

Unit

Symbol

V_CSL

Min

-0.5

2.3

Max

V_CSH

VCC

ｔHD;STA

：2us

ｔHD;DAT

：1us

ｔSU;DAT

：1us

ｔSU;STO

：2us

SCL

ｔBUF

：4us

ｔLOW

：3us

ｔHIGH

：1us

SDA

Figure 13.

A command timing example in

the I²C-BUS data transmission

SCL clock frequency：250kHz

www.rohm.com

TSZ02201-0C2C0E100310-1-2

22.Oct.2015 Rev.001

7/29

TSZ22111・15・001

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