ATF22V10C-15XC

更新时间： 2024-01-26 16:04:39

品牌	Logo	应用领域
爱特美尔 - ATMEL		/
页数	文件大小	规格书
18页	262K
描述
Highperformance EE PLD

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技术参数
数据手册

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ATF22V10C-15XC 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	TSSOP	包装说明：	TSSOP, TSSOP24,.25
针数：	24	Reach Compliance Code：	unknown
HTS代码：	8542.39.00.01	风险等级：	5.67
Is Samacsys：	N	架构：	PAL-TYPE
最大时钟频率：	55.5 MHz	JESD-30 代码：	R-PDSO-G24
JESD-609代码：	e0	长度：	7.8 mm
湿度敏感等级：	2	专用输入次数：	10
I/O 线路数量：	10	输入次数：	22
输出次数：	10	产品条款数：	132
端子数量：	24	最高工作温度：	85 °C
最低工作温度：	-40 °C	组织：	10 DEDICATED INPUTS, 10 I/O
输出函数：	MACROCELL	封装主体材料：	PLASTIC/EPOXY
封装代码：	TSSOP	封装等效代码：	TSSOP24,.25
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：	240	电源：	5 V
可编程逻辑类型：	FLASH PLD	传播延迟：	15 ns
认证状态：	Not Qualified	座面最大高度：	1.2 mm
子类别：	Programmable Logic Devices	最大供电电压：	5.5 V
最小供电电压：	4.5 V	标称供电电压：	5 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	GULL WING	端子节距：	0.65 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	30
宽度：	4.4 mm	Base Number Matches：	1

ATF22V10C-15XC 数据手册

Power-up Reset

The registers in the ATF22V10Cs are designed to reset during power-up. At a point

delayed slightly from V_CCcrossing V_RST, all registers will be reset to the low state. The

output state will depend on the polarity of the output buffer.

This feature is critical for state machine initialization. However, due to the asynchronous

nature of reset and the uncertainty of how V_CCactually rises in the system, the following

conditions are required:

1. The V_CCrise must be monotonic, and starts below 0.7V,

2. After reset occurs, all input and feedback setup times must be met before driving

the clock pin high, and

3. The clock must remain stable during t_PR

POWER

REGISTERED

OUTPUTS

CLOCK

Preload of Registered The ATF22V10C’s registers are provided with circuitry to allow loading of each register

with either a high or a low. This feature will simplify testing since any state can be forced

Outputs

into the registers to control test sequencing. A JEDEC file with preload is generated

when a source file with vectors is compiled. Once downloaded, the JEDEC file preload

sequence will be done automatically by most of the approved programmers after the

programming.

Electronic Signature There are 64 bits of programmable memory that are always available to the user, even if

the device is secured. These bits can be used for user-specific data.

Word

Parameter

t_PR

Description

Typ

600

3.8

Max

1,000

4.5

Units

Power-up Reset Time

Power-up Reset Voltage

V_RST

Security Fuse Usage A single fuse is provided to prevent unauthorized copying of the ATF22V10C fuse pat-

terns. Once programmed, fuse verify and preload are inhibited. However, the 64-bit

User Signature remains accessible.

The security fuse should be programmed last, as its effect is immediate.

Programming/

Erasing

Programming/erasing is performed using standard PLD programmers. See “CMOS PLD

Programming Hardware & Software Support” for information on software/programming.

ATF22V10C(Q)

0735P–PLD–01/02

1...3 4 567 8 9...18

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与ATF22V10C-15XC相关器件

型号	品牌	描述	获取价格	数据表
ATF22V10C-15XI	ATMEL	Highperformance EE PLD	获取价格
ATF22V10C-15XJ	ATMEL	Flash PLD, 15ns, CMOS, PDSO24, 4.40 MM, PLASTIC, MO-153AD, TSSOP-24	获取价格
ATF22V10C-15XL	ATMEL	Flash PLD, 15ns, CMOS, PDSO24, 4.40 MM, PLASTIC, MO-153AD, TSSOP-24	获取价格
ATF22V10C-5DC	ATMEL	Flash PLD, 5ns, CMOS, CDIP24, 0.300 INCH, WINDOWED, CERDIP-24	获取价格
ATF22V10C-5JC	ATMEL	High Performance E2 PLD	获取价格
ATF22V10C-5JL	ATMEL	Flash PLD, 5ns, CMOS, PQCC28, PLASTIC, MS-018AB, LCC-28	获取价格

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