5秒后页面跳转
ATF16V8C-7XI PDF预览

ATF16V8C-7XI

更新时间: 2024-02-26 07:22:29
品牌 Logo 应用领域
爱特美尔 - ATMEL 可编程逻辑器件
页数 文件大小 规格书
16页 549K
描述
High Performance E2 PLD

ATF16V8C-7XI 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:4.40 MM, PLASTIC, MO-153AC, TSSOP-20
针数:20Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.77
其他特性:8 MACROCELLS架构:PAL-TYPE
最大时钟频率:100 MHzJESD-30 代码:R-PDSO-G20
JESD-609代码:e0长度:6.5 mm
湿度敏感等级:2专用输入次数:7
I/O 线路数量:8输入次数:18
输出次数:8产品条款数:64
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C组织:7 DEDICATED INPUTS, 8 I/O
输出函数:MACROCELL封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP20,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):240电源:5 V
可编程逻辑类型:FLASH PLD传播延迟:7.5 ns
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Programmable Logic Devices最大供电电压:5.25 V
最小供电电压:4.75 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:4.4 mmBase Number Matches:1

ATF16V8C-7XI 数据手册

 浏览型号ATF16V8C-7XI的Datasheet PDF文件第4页浏览型号ATF16V8C-7XI的Datasheet PDF文件第5页浏览型号ATF16V8C-7XI的Datasheet PDF文件第6页浏览型号ATF16V8C-7XI的Datasheet PDF文件第8页浏览型号ATF16V8C-7XI的Datasheet PDF文件第9页浏览型号ATF16V8C-7XI的Datasheet PDF文件第10页 
ATF16V8C  
Functional Logic Diagram Description  
The Logic Option and Functional Diagrams describe the  
ATF16V8C architecture. Eight configurable macrocells  
can be configured as a registered output, combinatorial  
I/O, combinatorial output, or dedicated input.  
chitectural subsets can be found in each of the configura-  
tion modes described in the following pages. The user can  
download the listed subset device JEDEC programming  
file to the PLD programmer, and the ATF16V8C can be  
configured to act like the chosen device. Check with your  
programmer manufacturer for this capability.  
The ATF16V8C can be configured in one of three different  
modes. Each mode makes the ATF16V8C look like a dif-  
ferent device. Most PLD compilers can choose the right  
mode automatically. The user can also force the selection  
by supplying the compiler with a mode selection. The de-  
termining factors would be the usage of register versus  
combinatorial outputs and dedicated outputs versus out-  
puts with output enable control.  
Unused product terms are automatically disabled by the  
compiler to decrease power consumption. A Security  
Fuse, when programmed, protects the content of the  
ATF16V8C. Eight bytes (64 fuses) of User Signature are  
accessible to the user for purposes such as storing project  
name, part number, revision, or date. The User Signature  
is accessible regardless of the state of the Security Fuse.  
The ATF16V8C universal architecture can be pro-  
grammed to emulate many 20-pin PAL devices. These ar-  
Compiler Mode Selection  
Registered  
P16V8R  
Complex  
Simple  
Auto Select  
P16V8C  
P16V8AS  
P16V8PD  
G16V8AS  
P16V8  
ABEL, Atmel-ABEL  
with PD ENABLE  
(1)  
(1)  
(1)  
(1)  
P16V8PDR  
G16V8MS  
P16V8PDC  
G16V8MA  
P16V8PDS  
G16V8A  
CUPL, Atmel-CUPL  
with PD ENABLE  
G16V8CPMS  
G16V8CPMA  
GAL16V8_C7  
“Complex”  
P16V8C  
NA  
G16V8CPAS  
GAL16V8_C8  
“Simple”  
P16V8C  
NA  
G16V8CP  
(2)  
(2)  
(2)  
GAL16V8_R  
“Registered”  
P16V8R  
NA  
GAL16V8  
LOG/iC  
GAL16V8A  
P16V8A  
OrCAD-PLD  
PLDesigner  
ATF16V8C ALL  
ATF16V8C (PD) ALL  
G16V8  
Synario/Atmel-Synario  
with PD ENABLE  
(1)  
NA  
NA  
NA  
G16V8R  
G16V8C  
G16V8AS  
Tango-PLD  
Notes: 1. Please call Atmel PLD Hotline at (408) 436-4333 for more information.  
2. Only applicable for version 3.4 or lower.  
7

与ATF16V8C-7XI相关器件

型号 品牌 描述 获取价格 数据表
ATF16V8CZ ATMEL High Performance E2 PLD

获取价格

ATF16V8CZ MICROCHIP 250 gate, Zero power, Vcc-5V, Green package, Up to 16 Inputs, 8 I/Os, electrically erasabl

获取价格

ATF16V8CZ_05 ATMEL Highperformance EE PLD

获取价格

ATF16V8CZ-12JC ATMEL High Performance E2 PLD

获取价格

ATF16V8CZ-12JI ATMEL Programmable Logic Device

获取价格

ATF16V8CZ-12JL ATMEL Flash PLD, 12ns, CMOS, PQCC20, PLASTIC, MS-018AA, LCC-20

获取价格