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ATF1516SE-10RI256 PDF预览

ATF1516SE-10RI256

更新时间: 2024-01-19 05:15:10
品牌 Logo 应用领域
爱特美尔 - ATMEL 时钟ATM异步传输模式输入元件可编程逻辑
页数 文件大小 规格书
60页 1086K
描述
EE PLD, 10ns, PQFP208, HEAT SPREADER, PLASTIC, QFP-208

ATF1516SE-10RI256 技术参数

生命周期:Obsolete零件包装代码:QFP
包装说明:HEAT SPREADER, PLASTIC, QFP-208针数:208
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.84其他特性:CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V
最大时钟频率:125 MHzJESD-30 代码:S-PQFP-G208
长度:28 mm专用输入次数:
I/O 线路数量:160端子数量:208
最高工作温度:85 °C最低工作温度:-40 °C
组织:0 DEDICATED INPUTS, 160 I/O输出函数:MACROCELL
封装主体材料:PLASTIC/EPOXY封装代码:FQFP
封装形状:SQUARE封装形式:FLATPACK, FINE PITCH
可编程逻辑类型:EE PLD传播延迟:10 ns
认证状态:Not Qualified座面最大高度:3.85 mm
最大供电电压:5.25 V最小供电电压:4.75 V
标称供电电压:5 V表面贴装:YES
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
宽度:28 mmBase Number Matches:1

ATF1516SE-10RI256 数据手册

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Features  
2nd Generation EE PROM-based Complex Programmable Logic Devices  
– 4.5V to 5.5V Operating Range with I/Os 3.3 or 5V Compliant  
– 32 - 256 Macrocells with Enhanced Features  
– Pin-compatible with Industry Standard Devices  
– Speeds to 5 ns Maximum Pin-to-pin Delay  
– Registered Operation to 250 MHz  
Enhanced Macrocells with Logic DoublingFeatures  
– Bury Either Register or COM while Using the Other for Output  
– Dual Independent Feedback Allows Multiple Latch Functions per Macrocell  
– 5 Product Terms per Macrocell, expandable to 40 per Macrocell with Cascade  
Logic, Plus 15 more with Foldback Logic  
ATF15xxSE  
Family  
Datasheet  
– D/T/Latch Configurable Flip-flops plus Transparent Latches  
– Global and/or per Macrocell Register Control Signals  
– Global and/or per Macrocell Output Enable  
– Programmable Output Slew Rate per Macrocell  
– Programmable Output Open Collector Option per Macrocell  
– Fast Registered Input from Product Term  
Enhanced Connectivity  
ATF1502SE(L)  
ATF1504SE(L)  
ATF1508SE(L)  
ATF1516SE(L)  
– Single Level Switch Matrix for Maximum Routing Options  
– Up to 40 Inputs per Logic Block  
Advanced Power Management Features  
– ITD (Input Transition Detection) Available Individually on Global Clocks, Inputs  
and I/O for µA Level Standby Current for “L” Versions  
– Pin-controlled 1 mA Standby Mode  
– Reduced-power per Macrocell  
– Automatic Power Down of Unused Macrocells  
– Programmable Pin-keeper Inputs and I/Os  
Available in Commercial and Industrial Temperature Ranges  
Available in All Popular Packages Including PLCC, PQFP and TQFP  
EE PROM Technology  
– 100% Tested  
– Completely Reprogrammable  
– 10,000 Program/Erase Cycles  
Preliminary  
– 20 Year Data Retention  
– 2000V ESD Protection  
– 200 mA Latch-up Immunity  
JTAG Boundary-scan Testing Port per IEEE 1149.1-1990 and 1149.1a-1993  
– Pull-up Option on JTAG Pins TMS and TDI  
IEEE 1532 Compatibility for Fast In-System Programmability (ISP) via JTAG  
PCI-compliant  
Security Fuse Feature  
Rev. 2401A–08/01  

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