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ATF1504AE-10CI100 PDF预览

ATF1504AE-10CI100

更新时间： 2024-02-09 01:04:53
品牌 Logo 应用领域
爱特美尔 - ATMEL 时钟输入元件可编程逻辑
页数 文件大小 规格书
73页 1713K
描述
EE PLD, 10ns, PBGA100, 1 MM PITCH, TBGA-100

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ATF1504AE-10CI100 技术参数

生命周期：Obsolete零件包装代码：BGA
包装说明：1 MM PITCH, TBGA-100针数：100
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.69最大时钟频率：100 MHz
JESD-30 代码：S-PBGA-B100专用输入次数：
I/O 线路数量：64端子数量：100
最高工作温度：85 °C最低工作温度：-40 °C
组织：0 DEDICATED INPUTS, 64 I/O输出函数：MACROCELL
封装主体材料：PLASTIC/EPOXY封装代码：BGA
封装形状：SQUARE封装形式：GRID ARRAY
可编程逻辑类型：EE PLD传播延迟：10 ns
认证状态：Not Qualified最大供电电压：3.6 V
最小供电电压：3 V标称供电电压：3.3 V
表面贴装：YES温度等级：INDUSTRIAL
端子形式：BALL端子节距：1 mm
端子位置：BOTTOMBase Number Matches：1

ATF1504AE-10CI100 数据手册

 浏览型号ATF1504AE-10CI100的Datasheet PDF文件第2页浏览型号ATF1504AE-10CI100的Datasheet PDF文件第3页浏览型号ATF1504AE-10CI100的Datasheet PDF文件第4页浏览型号ATF1504AE-10CI100的Datasheet PDF文件第6页浏览型号ATF1504AE-10CI100的Datasheet PDF文件第7页浏览型号ATF1504AE-10CI100的Datasheet PDF文件第8页 
ATF15xxAE Family  
General  
Description  
Beginning with the introduction of the 100% connected ATF1500 with 32 enhanced macrocells  
in 1996, Atmel’s CPLD products have delivered extra IO connectivity and logic reusability.  
Atmel’s commitment to efficient, flexible architecture has continued with the current Atmel  
ATF15xx Family of industry-standard, pin-compatible CPLDs. Atmel’s Logic Doubling archi-  
tecture consists of wider fan-in, additional routing and clock options, combined with  
sophisticated, proprietary device fitters, extend CPLD place and route efficiency. Atmel  
enhanced macrocell includes double independent buried feedback that allows designers to  
pack more logic (particularly shifters and latches) into a smaller CPLD or leave spare room for  
later revisions. The Atmel ATF15xx family delivers enhanced functionality and flexibility with  
no additional design effort and is highly cost effective.  
The Atmel ATF15xx Family includes all popular configurations and speeds.  
Table 1. ATF15xxAE Family Device Features  
Feature  
ATF1502AE(L)  
ATF1504AE(L)  
ATF1508AE(L)  
ATF1516AE(L)  
5000  
ATF1532AE(L)  
10000  
512  
Usable Gates  
Macrocells  
625  
1250  
2500  
128  
32  
64  
256  
Logic Blocks  
Max. # Pins  
Max. User I/Os  
TPD Grades (ns)  
2
44  
4
100  
8
16  
32  
256  
256  
256  
36  
68  
100  
164  
212  
4, 7, 10(15)  
4, 7, 10(15)  
5, 7, 10(15)  
5, 7, 10(15)  
5, 7, 12(15)  
The Atmel ATF15xxAE Family includes pin-compatible products in all popular packages.  
Table 2. ATF15xxAE Family Device Packages and Number of Signal Pins(1)(2)  
Packages  
ATF1502AE(L)  
ATF1504AE(L)  
ATF1508AE(L)  
ATF1516AE(L)  
ATF1532AE(L)  
44-pin PLCC  
44-pin TQFP  
49-ball BGA  
84-pin PLCC  
100-pin TQFP  
100-ball BGA  
144-pin TQFP  
169-ball BGA  
208-pin PQFP  
256-ball BGA  
36  
36  
36  
36  
41  
68  
84(3)  
84  
68  
68  
84  
84  
100  
100  
120  
120  
164  
164  
176  
212  
100  
Notes: 1. Contact Atmel for up-to-date information on device and package availability.  
2. When the JTAG port is used for In System Programming (ISP) or Boundary-scan Testing  
(BST), the four associated pins become JTAG pins and are unavailable for user I/O.  
3. Thermal Analysis must be performed for this package to ensure compliance with DC and AC  
operating conditions. For more information, see “Thermal Characteristic’s of Atmel  
Packages”.  
5
2398B–08/01  
12345678...73

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