Datasheet > ATF1502AS

ATF1502AS

更新时间： 2023-12-06 20:08:09

品牌	Logo	应用领域
美国微芯 - MICROCHIP		/
页数	文件大小	规格书
29页	956K
描述
32 Macro-cells (MC), Low-power, Vcc 5V, Green Package, CPLD Fastest Speed of 7ns

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ATF1502AS 数据手册

Enhanced Features

 Improved Connectivity (Additional Feedback Routing, Alternate Input Routing)

 Output Enable Product Terms

 D Latch Mode

 Combinatorial Output with Registered Feedback within Any Macrocell

 Three Global Clock Pins

 ITD (Input Transition Detection) Circuits on Global Clocks, Inputs and I/O (“L” Versions)

 Fast Registered Input from Product Term

 Programmable “Pin-keeper” Option

 V_CCPower-up Reset Option

 Pull-up Option on JTAG Pins TMS and TDI

 Advanced Power Management Features

Input Transition Detection

Power-down (“L” Versions)

Individual Macrocell Power Option

Disable ITD on Global Clocks, Inputs, and I/O

Description

The Atmel^®ATF1502AS(L) is a high-performance, high-density Complex Programmable Logic Device (CPLD)

which utilizes the Atmel proven electrically-erasable technology. With 32 logic macrocells and up to 36 inputs, it

easily integrates logic from several TTL, SSI, MSI, LSI, and classic PLDs. The ATF1502AS(L)’s enhanced

routing switch matrices increase usable gate count and the odds of successful pin-locked design modifications.

The ATF1502AS(L) has up to 32 bi-directional I/O pins and four dedicated input pins, depending on the type of

device package selected. Each dedicated pin can serve as a global control signal, register clock, register reset,

or output enable. Each of these control signals can be selected for use individually within each macrocell.

Each of the 32 macrocells generates a buried feedback which goes to the global bus. Each input and I/O pin

also feeds into the global bus. The switch matrix in each logic block then selects 40 individual signals from the

global bus. Each macrocell also generates a foldback logic term that goes to a regional bus. Cascade logic

between macrocells in the ATF1502AS(L) allows fast, efficient generation of complex logic functions. The

ATF1502AS(L) contains four such logic chains, each capable of creating sum term logic with a fan-in of up to

40 product terms.

The ATF1502AS(L) macrocell, shown in Figure 1, is flexible enough to support highly complex logic functions

operating at high speed. The macrocell consists of five sections:



Product Terms and Product Term Select Multiplexer

OR/XOR/CASCADE Logic

Flip-flop

Output Select and Enable

Logic Array Inputs

ATF1502AS(L) [DATASHEET]

Atmel-0995L-CPLD-ATF1502AS(L)-Datasheet_032014

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