Datasheet > ATA663254-GAQW

ATA663254-GAQW

更新时间： 2024-02-26 12:15:37

品牌	Logo	应用领域
美国微芯 - MICROCHIP		电信光电二极管电信集成电路
页数	文件大小	规格书
29页	1155K
描述
IC TXRX LIN W/VOLT REG 8SOIC

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ATA663254-GAQW 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	包装说明：	SOP,
Reach Compliance Code：	compliant	Factory Lead Time：	24 weeks
风险等级：	5.78	JESD-30 代码：	R-PDSO-G8
JESD-609代码：	e4	长度：	4.9 mm
功能数量：	1	端子数量：	8
封装主体材料：	PLASTIC/EPOXY	封装代码：	SOP
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE
筛选级别：	TS 16949	座面最大高度：	1.75 mm
标称供电电压：	13.5 V	表面贴装：	YES
电信集成电路类型：	INTERFACE CIRCUIT	端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：	GULL WING	端子节距：	1.27 mm
端子位置：	DUAL	宽度：	3.9 mm
Base Number Matches：	1

ATA663254-GAQW 数据手册

Pin Description

3.1

Supply Pin (VS)

LIN operating voltage is V_S= 5V to 28V. Undervoltage detection is implemented to disable transmission if V_Sfalls below typ.

4.5V, thereby avoiding false bus messages. After switching on V_S, the IC starts in fail-safe mode and the voltage regulator is

switched on.

The supply current in sleep mode is typically 9µA and 47µA in silent mode.

3.2

3.3

Ground Pin (GND)

The IC does not affect the LIN bus in the event of GND disconnection. It is able to handle a ground shift of up to 11.5% of V_S.

Voltage Regulator Output Pin (VCC)

The internal 3.3V/5V voltage regulator is capable of driving loads up to 85mA, supplying the microcontroller and other ICs on

the PCB and is protected against overload by means of current limitation and overtemperature shutdown. Furthermore, the

output voltage is monitored and causes a reset signal at the NRES output pin if it drops below a defined threshold

V_{VCC_th_uv_down}

3.4

3.5

Undervoltage Reset Output (NRES)

If the V_CCvoltage falls below the undervoltage detection threshold V_{CC_th_uv_down}, NRES switches to low after t_{res_f}. The

NRES stays low even if V_CC= 0V because NRES is internally driven from the V_Svoltage. If V_Svoltage ramps down, NRES

stays low until V_S< 1.5V and then becomes highly impedant.

The implemented undervoltage delay keeps NRES low for t_Reset= 4ms after V_CCreaches its nominal value.

Bus Pin (LIN) (SBC only)

A low-side driver with internal current limitation and thermal shutdown as well as an internal pull-up resistor according to LIN

specification 2.x is implemented. The voltage range is from –27V to +40V. This pin exhibits no reverse current from the LIN

bus to V_S, even in the event of a GND shift or V_Batdisconnection. The LIN receiver thresholds comply with the LIN protocol

specification.

The fall time (from recessive to dominant) and the rise time (from dominant to recessive) are slope-controlled.

During a short circuit at LIN to V_Bat, the output limits the output current to I_{BUS_LIM}. Due to the power dissipation, the chip

temperature exceeds T_LINoffand the LIN output is switched off. The chip cools down and after a hysteresis of T_hys, switches

the output on again. RXD stays on high because LIN is high. The V_CCregulator works independently during LIN

overtemperature switch-off.

During a short circuit from LIN to GND the IC can be switched into sleep or silent mode and even in this case the current

consumption is lower than 100µA in sleep mode and lower than 120µA in silent mode. If the short-circuit disappears, the IC

starts with a remote wake-up.

The reverse current is < 2µA at pin LIN during loss of V_Bat. This is optimal behavior for bus systems where some slave nodes

are supplied from battery or ignition.

ATA663201/ATA663203/ATA663231/ATA663254 [DATASHEET]

9337G–AUTO–09/16

1 2 3 456 7 8...29

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