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ATA6561-GAQW-N PDF预览

ATA6561-GAQW-N

更新时间: 2024-02-19 22:27:49
品牌 Logo 应用领域
美国微芯 - MICROCHIP 电信光电二极管电信集成电路
页数 文件大小 规格书
28页 800K
描述
Interface Circuit

ATA6561-GAQW-N 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:SOP, SOP8,.24Reach Compliance Code:compliant
Factory Lead Time:8 weeks风险等级:1.72
JESD-30 代码:R-PDSO-G8长度:4.9 mm
功能数量:1端子数量:8
收发器数量:1封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP8,.24
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
筛选级别:TS 16949座面最大高度:1.75 mm
最大压摆率:70 mA标称供电电压:5 V
表面贴装:YES电信集成电路类型:CAN TRANSCEIVER
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL宽度:3.9 mm
Base Number Matches:1

ATA6561-GAQW-N 数据手册

 浏览型号ATA6561-GAQW-N的Datasheet PDF文件第3页浏览型号ATA6561-GAQW-N的Datasheet PDF文件第4页浏览型号ATA6561-GAQW-N的Datasheet PDF文件第5页浏览型号ATA6561-GAQW-N的Datasheet PDF文件第7页浏览型号ATA6561-GAQW-N的Datasheet PDF文件第8页浏览型号ATA6561-GAQW-N的Datasheet PDF文件第9页 
ATA6560/1  
1.1.2  
SILENT MODE (ONLY FOR THE  
ATA6560)  
1.2.2  
INTERNAL PULL-UP STRUCTURE  
AT TXD, NSIL, AND STBY INPUT  
PINS  
A low level on the NSIL pin (available on pin 5) and on  
the STBY pin selects the Silent mode. This  
receive-only mode can be used to test the connection  
of the bus medium. In the Silent mode, the ATA6560  
can still receive data from the bus, but the transmitter is  
disabled and therefore no data can be sent to the CAN  
bus. The bus pins are released to recessive state. All  
other IC functions, including the HSC, continue to oper-  
ate as they do in the Normal mode. The Silent mode  
can be used to prevent a faulty CAN controller from  
disrupting all network communications.  
The TXD, STBY, and NSIL pins have an internal pull-up  
to VIO. This ensures a safe, defined state in case one  
or all of these pins are left floating. Pull-up currents flow  
in these pins in all states, meaning all pins should be in  
a high state during the Standby mode to minimize the  
current consumption.  
1.2.3  
UNDERVOLTAGE DETECTION ON  
PINS VCC AND VIO  
If VVCC or VVIO drops below their respective undervoltage  
detection levels (Vuvd(VCC) and Vuvd(VIO), see Section 2.0  
“Electrical Characteristics”), the transceiver switches  
off and disengages from the bus until VVCC and VVIO have  
recovered. The low-power WUC is only switched off  
during a VCC or VIO undervoltage. The logic state of the  
STBY pin is ignored until the VCC voltage or the VIO  
voltage has recovered.  
1.1.3  
STANDBY MODE  
A high level on the STBY pin selects the Standby  
mode. In this mode, the transceiver cannot transmit or  
correctly receive data via the bus lines. The transmitter  
and the HSC are switched off to reduce current con-  
sumption, and only the low-power Wake-Up Compara-  
tor (WUC) monitors the bus lines for a valid wake-up  
signal. A signal change on the bus from “Recessive” to  
“Dominant,” followed by a dominant state longer than  
twake, switches the RXD pin to low to signal a wake-up  
request to the microcontroller.  
1.2.4  
BUS WAKE-UP TIME-OUT  
FUNCTION  
In the Standby mode, a bus wake-up time-out timer is  
started when the CAN bus changes from recessive to  
dominant state. If the dominant state on the bus persists  
for longer than tto_bus, the RXD pin is switched to high.  
This function prevents a clamped dominant bus (due to a  
bus short circuit or a failure in one of the other nodes on  
the network) from generating a permanent wake-up  
request. The bus wake-up time-out timer is reset when  
the CAN bus changes from dominant to recessive state.  
In the Standby mode, the bus lines are biased to  
ground to reduce current consumption to a minimum.  
The WUC monitors the bus lines for a valid wake-up  
signal. When the RXD pin switches to low to signal a  
wake-up request, a transition to the Normal mode is not  
triggered until the microcontroller forces back the STBY  
pin to low. A bus dominant time-out timer prevents the  
device from generating a permanent wake-up request  
by switching the RXD pin to high.  
1.2.5  
OVERTEMPERATURE PROTECTION  
For ATA6560 only: If the NSIL input pin is set to low in  
the Standby mode, the internal pull-up resistor causes  
an additional quiescent current from VIO to GND.  
Microchip recommends setting the NSIL pin to high in  
the Standby mode.  
The output drivers are protected against overtemperature  
conditions. If the junction temperature exceeds the  
shutdown junction temperature, TJsd, the output drivers  
are disabled until the junction temperature drops below  
TJsd and pin TXD is at a high level again. The TXD  
condition ensures that output driver oscillations due to  
temperature drift are avoided.  
1.2  
Fail-Safe Features  
1.2.1  
TXD DOMINANT TIME-OUT  
FUNCTION  
A TXD dominant time-out timer is started when the  
TXD pin is set to low. If the low state on the TXD pin  
persists for longer than tto(dom)TXD, the transmitter is  
disabled, releasing the bus lines to a recessive state.  
This function prevents a hardware failure, software  
application failure, or both from driving the bus lines to  
a permanent dominant state (blocking all network  
communications). The TXD dominant time-out timer is  
reset when the TXD pin is set to high (≥ 4 µs).  
DS20005991A-page 6  
2018 Microchip Technology Inc.  

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