Datasheet > ATA5279C-WGQW

ATA5279C-WGQW

更新时间： 2024-02-29 07:23:49

品牌	Logo	应用领域
爱特美尔 - ATMEL		ATM 异步传输模式电信电信集成电路
页数	文件大小	规格书
37页	1182K
描述
Telecom Circuit, 1-Func, 7 X 7 MM, VQFN-48

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技术参数
数据手册

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ATA5279C-WGQW 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	包装说明：	7 X 7 MM, VQFN-48
Reach Compliance Code：	compliant	风险等级：	1.01
JESD-30 代码：	S-XQCC-N48	JESD-609代码：	e3
长度：	7 mm	功能数量：	1
端子数量：	48	最高工作温度：	105 °C
最低工作温度：	-40 °C	封装主体材料：	UNSPECIFIED
封装代码：	HVQCCN	封装形状：	SQUARE
封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	座面最大高度：	0.95 mm
标称供电电压：	5 V	表面贴装：	YES
电信集成电路类型：	TELECOM CIRCUIT	温度等级：	INDUSTRIAL
端子面层：	Matte Tin (Sn)	端子形式：	NO LEAD
端子节距：	0.5 mm	端子位置：	QUAD
宽度：	7 mm	Base Number Matches：	1

ATA5279C-WGQW 数据手册

3.2

Coil Driver Stage

The driver stage for each coil consists of two N-channel DMOS transistors. The low-side transistor is in Darlington

configuration to maintain a source-follower characteristic.

Figure 3-1. Principle Driver Stage Setup

VDS

I_HSDiag

I_HS

Diag Enable

N_mirr

VSin_pre

AxP

Ax_State

P_mirr1

P_mirr2

N_pwr

Diag Enable

Internal nodes

I_LS

I_LSDiag

GND

In the graphic above, the names of internal pins have a grey shaded background, and the hatched area is not part of the

driver stage itself but only used in diagnostic mode (please refer to the Diagnosis Block description for further information on

this topic).

The driver stages are supplied by the three VDS pins, which are tied together inside the chip.

A quiescence current regulation ensures low cross current while in idle state. The output transistors are monitored for current

and temperature to protect them from damage caused by irregular load conditions or too high ambient temperatures.

The driving stage is optimized for signal quality to ensure low harmonic distortions.

Two groups of driver stages are integrated: the first group is intended for high-current coils, whereas the second group

drives low-current coils. Note that there are certain coil impedance ranges for each driver group. If the connected load

exceeds this range, proper current regulation and/or data modulation is not guaranteed.

While in idle mode and especially during a transmission, the driver stages of the five inactive (i.e., not selected) coils are

switched to high-side outputs, i.e., the positive coil connection lines are tied to the VDS potential. The same applies to the

return line inputs AxN. These measures ensure minimum parasitic currents in the disabled coils while the selected coil is

operating.

ATA5279/ATA5279C [DATASHEET]

9125P–RKE–05/14

1...3 4 567 8 9...37

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