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AT97SC3201-01MC PDF预览

AT97SC3201-01MC

更新时间: 2024-01-24 03:47:50
品牌 Logo 应用领域
爱特美尔 - ATMEL /
页数 文件大小 规格书
7页 212K
描述
Trusted Platform Module

AT97SC3201-01MC 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:QCCN, LCC40,.24SQ,20Reach Compliance Code:unknown
风险等级:5.92JESD-30 代码:S-PQCC-N40
JESD-609代码:e0端子数量:40
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:QCCN
封装等效代码:LCC40,.24SQ,20封装形状:SQUARE
封装形式:CHIP CARRIER电源:3.3 V
认证状态:Not Qualified子类别:Telecom Encryption Circuits
最大压摆率:0.05 mA标称供电电压:3.3 V
表面贴装:YES技术:CMOS
电信集成电路类型:DATA ENCRYPTION CIRCUIT温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD

AT97SC3201-01MC 数据手册

 浏览型号AT97SC3201-01MC的Datasheet PDF文件第2页浏览型号AT97SC3201-01MC的Datasheet PDF文件第3页浏览型号AT97SC3201-01MC的Datasheet PDF文件第4页浏览型号AT97SC3201-01MC的Datasheet PDF文件第5页浏览型号AT97SC3201-01MC的Datasheet PDF文件第6页浏览型号AT97SC3201-01MC的Datasheet PDF文件第7页 
Features  
Full TCG/TCPA V1.1b Compatibility  
Single Chip Turnkey Solution  
Hardware Asymmetric Crypto Engine  
2048 RSA Sign in 500 ms Using CRT  
AVR 8-bit RISC Microprocessor  
Internal EEPROM Storage for 10+ RSA Keys  
33 MHz LPC (Low Pin Count) Bus for Easy PC Interface  
100 KHz System Management Bus (SMBus) Two-wire Interface  
Secure Hardware and Firmware Design and Chip Layout  
True Random Number Generator (RNG)  
Secure Real-time Clock Option  
3.3V 10ꢀ Supply Voltage  
28-lead TSSOP Package or 40-lead MLF Package  
0–70°C Temperature Range  
Trusted  
Platform  
Module  
Description  
The AT97SC3201 is a fully integrated security module designed to be integrated into  
personal computers and other embedded systems. It implements version 1.1b of the  
Trusted Computing Platform Alliance (TCPA) specification for Trusted Platform  
Modules (TPM). This specification has been adopted by the Trusted Computing Group  
(TCG).  
AT97SC3201  
Summary  
The TPM includes a crypto accelerator capable of computing a 2048-bit RSA  
signature in 500 ms and a 1024-bit RSA signature in 100 ms, both using CRT.  
Communication to and from the TPM can occur through one of two interface  
protocols: either a 33-MHz LPC interface or a 100-KHz SMBus two-wire interface.  
Figure 1. AT97SC3201 Block Diagram  
ROM  
Program  
EEPROM  
Program  
AVR  
8/16 Bit  
CPU  
33 MHz  
LPC  
Interface  
SRAM  
EEPROM  
Data  
SMBCLK/IOA  
SMBDAT/IOB  
IOC  
SMBus Interface  
or GPIO  
RNG  
CRYPTO  
Engine  
VBB  
32.768 kHz  
RTC  
Timer  
Physical  
Security  
Circuitry  
The chip includes a full hardware random number generator that is used for the TCG  
protocol and is also available to the system for any random numbers it may need  
during normal operation.  
Rev. 2015DS-TPM–7/04  
Note: This is a summary document. A complete document is  
available under NDA. For more information, please contact your  
local Atmel sales office.  

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