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AT91SO50 PDF预览

AT91SO50

更新时间: 2024-02-04 00:15:12
品牌 Logo 应用领域
爱特美尔 - ATMEL 微控制器电子
页数 文件大小 规格书
7页 287K
描述
Secure Microcontroller for Electronic Transaction Terminal / Reader

AT91SO50 技术参数

生命周期:Transferred包装说明:,
Reach Compliance Code:unknown风险等级:5.78
Base Number Matches:1

AT91SO50 数据手册

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Features  
General  
High-performance, Low-power 32-bit ARM®-SC100Enhanced RISC Architecture  
Von Neumann Load / Store Architecture  
– single 32-bit Data Bus for Instructions and Data  
Memory Protection unit  
Internal Oscillator (VFO) (up to 50 MHz)  
ESD Protection to ± 2000V (± 6000V on the ISO interfaces)  
Operating Ranges: 3.3V (+/- 10%)  
Compliant with EMV Level 1, VISA PED, APACS, ZKA, Common Criteria (EAL4+),  
FINREAD  
Secure  
Microcontroller  
for Electronic  
Transaction  
Terminal /  
Memory  
256 bits of Key Storage (battery backup)  
32K Bytes of internal ROM Memory (Bootstrap & Crypto library)  
256K Bytes of Internal EEPROM, Including 128 OTP Bytes and 384-byte Bit-  
addressable Bytes  
1 to 128-byte Program/Erase  
2 ms Program, 2 ms Erase  
Endurance: 100,000 Write/Erase Cycles at temperature of 25 degrees C  
10 Years Data Retention  
Reader  
100K Bytes of Internal RAM (4KB Crypto RAM)  
up to 16M Bytes of External Memory (AT91SO100/101 only)  
AT91SO100/101  
AT91SO50/51  
AT91SO25  
Peripherals  
Page Unit to access External Memory Page (AT91SO100/101 only)  
Static Memory Controller (AT91SO100/101 only)  
Two ISO 7816 controllers with DC/DC (one of them can be multiplexed to address 4  
SAM). The DC/DC converter AT83C26 is not included in the versions AT91SO100,  
AT91SO50 and AT91SO25. But the two ISO 7816 controllers are still available  
USB 2.0 Full Speed (8 endpoints)  
Summary  
SPI Controller (up to 6Mbps) and Two Wire Interface  
Two Universal Synchronous/Asynchronous Receiver Transmitters (USART)  
Triple Track Magstripe Logical Interface  
5 8-bit I/O Port Interface (LEDs, Keyboard, LCD, spare...)  
Real Time Clock (RTC) with Alarm interrupt  
System Timer including a 16-bit Counter, Watchdog and Second Counter  
Six-channel 16-bit Timer/counter  
2-level, 28-interrupt Controller  
Hardware DES and Triple DES DPA Resistant  
Hardware AES 128-192-256  
Hardware SHA-1, SHA-256  
True Random Number Generator (RNG)  
Two CRC 16 Engines and one CRC 32 Engine (Compliant with ISO/IEC 3309)  
AdvX - Advanced crypto multiplier for cryptography and authentication (including  
RSA, DSA, Key Generation, ECC)  
Security  
Dedicated Hardware for Protection Against SPA/DPA Attacks  
Advanced Protection Against Physical Attack, Including Active Shield  
Intrusion sensors (mesh and switches).  
Environmental Protection Systems (Voltage, Frequency, UV andTemperature)  
Secure Memory Management/Access Protection (MPU)  
Real time clock and battery back up  
6514BS–SPD–10 May 07  
Compliant with EMV standard, VISA PED and FINREAD  
Note: This is a summary document. A complete document will be  
available under NDA. For more information, please contact your  
local Atmel sales office.  

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