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AT25160T2-10TC-1.8 PDF预览

AT25160T2-10TC-1.8

更新时间： 2024-01-17 18:58:17
品牌 Logo 应用领域
爱特美尔 - ATMEL 可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟ATM异步传输模式光电二极管内存集成电路
页数 文件大小 规格书
19页 279K
描述
EEPROM, 2KX8, Serial, CMOS, PDSO20, 0.170 INCH, TSSOP-20

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AT25160T2-10TC-1.8 技术参数

是否Rohs认证：不符合生命周期：Obsolete
零件包装代码：TSSOP包装说明：TSSOP, TSSOP20,.25
针数：20Reach Compliance Code：unknown
ECCN代码：EAR99HTS代码：8542.32.00.51
风险等级：5.81Is Samacsys：N
其他特性：DATA RETENTION: 100 YEARS最大时钟频率 (fCLK)：0.5 MHz
数据保留时间-最小值：100耐久性：1000000 Write/Erase Cycles
JESD-30 代码：R-PDSO-G20JESD-609代码：e0
长度：6.5 mm内存密度：16384 bit
内存集成电路类型：EEPROM内存宽度：8
湿度敏感等级：2功能数量：1
端子数量：20字数：2048 words
字数代码：2000工作模式：SYNCHRONOUS
最高工作温度：70 °C最低工作温度：
组织：2KX8封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP20,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
并行/串行：SERIAL电源：2/3.3 V
认证状态：Not Qualified座面最大高度：1.2 mm
串行总线类型：SPI最大待机电流：1e-7 A
子类别：EEPROMs最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：1.8 V标称供电电压 (Vsup)：2.5 V
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL宽度：4.4 mm
最长写入周期时间 (tWC)：20 ms写保护：HARDWARE/SOFTWARE
Base Number Matches：1

AT25160T2-10TC-1.8 数据手册

 浏览型号AT25160T2-10TC-1.8的Datasheet PDF文件第3页浏览型号AT25160T2-10TC-1.8的Datasheet PDF文件第4页浏览型号AT25160T2-10TC-1.8的Datasheet PDF文件第5页浏览型号AT25160T2-10TC-1.8的Datasheet PDF文件第7页浏览型号AT25160T2-10TC-1.8的Datasheet PDF文件第8页浏览型号AT25160T2-10TC-1.8的Datasheet PDF文件第9页 
Serial Interface  
Description  
MASTER: The device that generates the serial clock.  
SLAVE: Because the Serial Clock pin (SCK) is always an input, the AT25080/160/320/640  
always operates as a slave.  
TRANSMITTER/RECEIVER: The AT25080/160/320/640 has separate pins designated for  
data transmission (SO) and reception (SI).  
MSB: The Most Significant Bit (MSB) is the first bit transmitted and received.  
SERIAL OP-CODE: After the device is selected with CS going low, the first byte will be  
received. This byte contains the op-code that defines the operations to be performed.  
INVALID OP-CODE: If an invalid op-code is received, no data will be shifted into the  
AT25080/160/320/640, and the serial output pin (SO) will remain in a high impedance state  
until the falling edge of CS is detected again. This will reinitialize the serial communication.  
CHIP SELECT: The AT25080/160/320/640 is selected when the CS pin is low. When the  
device is not selected, data will not be accepted via the SI pin, and the serial output pin (SO)  
will remain in a high impedance state.  
HOLD: The HOLD pin is used in conjunction with the CS pin to select the  
AT25080/160/320/640. When the device is selected and a serial sequence is underway,  
HOLD can be used to pause the serial communication with the master device without resetting  
the serial sequence. To pause, the HOLD pin must be brought low while the SCK pin is low.  
To resume serial communication, the HOLD pin is brought high while the SCK pin is low (SCK  
may still toggle during HOLD). Inputs to the SI pin will be ignored while the SO pin is in the  
high impedance state.  
WRITE PROTECT: The write protect pin (WP) will allow normal read/write operations when  
held high. When the WP pin is brought low and WPEN bit is “1”, all write operations to the sta-  
tus register are inhibited. WP going low while CS is still low will interrupt a write to the status  
register. If the internal write cycle has already been initiated, WP going low will have no effect  
on any write operation to the status register. The WP pin function is blocked when the WPEN  
bit in the status register is "0". This will allow the user to install the AT25080/160/320/640 in a  
system with the WP pin tied to ground and still be able to write to the status register. All WP  
pin functions are enabled when the WPEN bit is set to “1”.  
6
AT25080/160/320/640  
0675F–08/01  
1...3456789...19

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