Datasheet > AS4C64M16D3A

AS4C64M16D3A

更新时间： 2022-02-26 12:00:37

品牌	Logo	应用领域
ALSC		/
页数	文件大小	规格书
86页	1646K
描述
96 ball FBGA PACKAGE

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AS4C64M16D3A 数据手册

AS4C64M16D3A-12BIN

AS4C64M16D3A-12BCN

Features

Overview

JEDEC Standard Compliant

The 1Gb Double-Data-Rate-3 DRAMs is double data

rate architecture to achieve high-speed operation. It is

internally configured as an eight bank DRAM.

The 1Gb chip is organized as 8Mbit x 16 I/Os x 8

bank devices. These synchronous devices achieve

high speed double-data-rate transfer rates of up to

1600 Mb/sec/pin for general applications.

The chip is designed to comply with all key DDR3

DRAM key features and all of the control and address

inputs are synchronized with a pair of externally

supplied differential clocks. Inputs are latched at the

cross point of differential clocks (CK rising and CK#

falling). All I/Os are synchronized with differential DQS

pair in a source synchronous fashion.

•

Power supplies: V_DD& V_DDQ= +1.5V ± 0.075V

Operating temperature:

Commercial: 0°C to 95°C (TC)

Industrial :-40°C to 95°C (TC)

Supports JEDEC clock jitter specification

Fully synchronous operation

Fast clock rate: 800MHz

Differential Clock, CK & CK#

Bidirectional differential data strobe

- DQS & DQS#

8 internal banks for concurrent operation

8n-bit prefetch architecture

Pipelined internal architecture

Precharge & active power down

Programmable Mode & Extended Mode registers

Additive Latency (AL): 0, CL-1, CL-2

Programmable Burst lengths: 4, 8

Burst type: Sequential / Interleave

•

These devices operate with a single 1.5V ± 0.075V

power supply and are available in BGA packages.

• Output Driver Impedance Control

• 8192 refresh cycles / 64ms

- Average refresh period

7.8μs @ -40℃≦TC≦ +85℃

3.9μs @ +85℃＜TC≦ +95℃

• Write Leveling

• ZQ Calibration

• Dynamic ODT (Rtt_Nom & Rtt_WR)

RoHS compliant

•

Auto Refresh and Self Refresh

96-ball 8 x 13 x 1.0mm FBGA package

- Pb and Halogen Free

Tableꢀ1.ꢀOrderingꢀInformationꢀ

Temperature

Max Clock (MHz)

800

Org

Product part No

Package

AS4C64M16D3A-12BCN

96-ball FBGA

64M x 16

Commercial 0°C to 95°C

800

AS4C64M16D3A-12BIN

96-ball FBGA

Industrial -40°C to 95°C

Tableꢀ2.ꢀSpeedꢀGradeꢀInformationꢀ

Speed Grade

Clock Frequency CAS Latency

t_RCD

t_RP

(ns)

13.75

800 MHz

DDR3-1600

Confidential

- 2/86 -

Rev.1.0 Aug.2016

123 4 5 6 7...86

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与AS4C64M16D3A相关器件

型号	品牌	描述	获取价格	数据表
AS4C64M16D3A-12BCN	ALSC	96 ball FBGA PACKAGE	获取价格
AS4C64M16D3A-12BIN	ALSC	96 ball FBGA PACKAGE	获取价格
AS4C64M16D3L-12BCN	ALSC	JEDEC Standard Compliant	获取价格
AS4C64M16D3L-12BIN	ALSC	JEDEC Standard Compliant	获取价格
AS4C64M16D3LA-12BCN	ALSC	Fully synchronous operation	获取价格
AS4C64M16D3LA-12BIN	ALSC	Fully synchronous operation	获取价格