Datasheet > AS1312-BWLT-50

AS1312-BWLT-50

更新时间： 2022-05-10 13:28:46

品牌	Logo	应用领域
艾迈斯 - AMSCO		/
页数	文件大小	规格书
20页	577K
描述
Ul t ra Low Quiescent Cur rent , Hysteret ic DC-DC Step-Up Conver ter

阅读下载

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

AS1312-BWLT-50 数据手册

AS1312

Datasheet - Detailed Description

8 Detailed Description

8.1 Hysteretic Boost Converter

Hysteretic boost converters are so called because comparators are the active elements used to determine on-off timing via current and voltage

measurements. There is no continuously operating fixed oscillator, providing an independent timing reference. As a result, a hysteretic or

comparator based converter has a very low quiescent current. In addition, because there is no fixed timing reference, the operating frequency is

determined by external component (inductor and capacitors) and also the loading on the output.

Ripple at the output is an essential operating component. A power cycle is initiated when the output regulated voltage drops below the nominal

value of VOUT (0.99 x VOUT).

Inductor current is monitored by the control loop, ensuring that operation is always dis-continuous.

The application circuit shown in Figure 1 will support many requirements. However, further optimization may be useful, and the following is

offered as a guide to changing the passive components to more closely match the end requirement.

8.1.1 Input Loop Timing

The input loop consists of the source dc supply, the input capacitor, the main inductor, and the N-channel power switch. The on timing of the N-

channel switch is determined by a peak current measurement or a maximum on time. In the AS1312, peak current is 400mA (typ) and maximum

on time is 4.2µs (typ). Peak current measurement ensures that the on time varies as the input voltage varies. This imparts line regulation to the

converter.

The fixed on-time measurement is something of a safety feature to ensure that the power switch is never permanently on. The fixed on-time is

independent of input voltage changes. As a result, no line regulation exists.

Figure 9. Simplified Boost DCDC Architecture

SW2

V_IN

V_OUT

SW1

C_IN

C_OUT

R_LOAD

I_PK

GND

On time of the power switch (Faraday’s Law) is given by:

LI_PK

-----------------------------------------------------------------

T_ON

sec [volts, amps, ohms, Henry]

(EQ 1)

(EQ 2)

V_IN– (I_PKR_SW1+ I_PKR_L1

)

Applying Min and Max values and neglecting the resistive voltage drop across L1 and SW1;

L_MINI_{PK _ MIN}

T_{ON _ MIN}

V_{IN _ MAX}

L_MAXI_{PK _ MAX}

V_{IN _ MIN}

T_{ON _ MAX}

(EQ 3)

www.ams.com/DC-DC_Step-Up

Revision 1.12

7 - 20

1...4 5 678 9 10...20

下载PDF

与AS1312-BWLT-50相关器件

型号	品牌	描述	获取价格	数据表
AS1313	AMSCO	Wide input voltage range (2.4V to 5.5V)	获取价格
AS1313-BTDM-18	AMSCO	Wide input voltage range (2.4V to 5.5V)	获取价格
AS1313-BTDM-30	AMSCO	Wide input voltage range (2.4V to 5.5V)	获取价格
AS1313-BTDM-33	AMSCO	Wide input voltage range (2.4V to 5.5V)	获取价格
AS1313-BTDT-ES	AMSCO	Wide input voltage range (2.4V to 5.5V)	获取价格
AS1313-BWLT-12	AMSCO	Wide input voltage range (2.4V to 5.5V)	获取价格