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APE6809N-E PDF预览

APE6809N-E

更新时间: 2024-01-17 07:19:40
品牌 Logo 应用领域
富鼎先进 - A-POWER 微处理器复位电路
页数 文件大小 规格书
9页 171K
描述
3PIN MICROPROCESSOR RESET CIRCUIT

APE6809N-E 技术参数

生命周期:Contact Manufacturer零件包装代码:SOIC
包装说明:TSSOP,针数:3
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.68
其他特性:RESET THRESHOLD VOLTAGE IS 4.25V可调阈值:YES
模拟集成电路 - 其他类型:POWER SUPPLY MANAGEMENT CIRCUITJESD-30 代码:R-PDSO-G3
长度:2 mm信道数量:1
功能数量:1端子数量:3
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
认证状态:Not Qualified座面最大高度:1.1 mm
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):1 V
标称供电电压 (Vsup):2.75 V表面贴装:YES
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
宽度:1.25 mmBase Number Matches:1

APE6809N-E 数据手册

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Advanced Power  
Electronics Corp.  
APE6809_6812  
APPLICATION INFORMATION  
Ensuring a Valid Reset Output Down to VCC = 0  
RESET is guaranteed to be a logic low for VCC > 1.0V. Once VCC exceeds the  
reset threshold, an internal timer keeps RESET low for the reset timeout period; after  
this interval, RESET goes high. If a brownout condition occurs (VCC dips below the  
reset threshold), RESET goes low. Any time VCC goes below the reset threshold, the  
internal timer resets to zero, and RESET goes low. The internal timer starts after VCC  
returns above the reset threshold, and RESET remains low for the reset timeout  
period.  
When VCC falls below 1.0V, the APE6809/APE6811 RESET output no longer sinks  
current—it becomes an open circuit. Therefore, high-impedance CMOS logic inputs  
connected to RESET can drift to undetermined voltages.  
This presents no problem in most applications since most µP and other circuitry is  
inoperative with VCC below 1.0V. However, in applications where RESET must be  
valid down to 0V, adding a pull down resistor to causes any stray leakage currents to  
flow to ground, holding RESET low. R1’s value is not critical; 100k is large enough not  
to load RESET and small enough to pull RESET to ground. For the  
APE6810/APE6812 if RESET is required to remain valid for VCC < 1.0V.  
Ensuring a Valid Reset Output Down to VCC = 0  
Most µP supervisor ICs has reset threshold voltages between 5% and 10%  
below the value of nominal supply voltages. This ensures a reset will not occur within  
5% of the nominal supply, but will occur when the supply is 10% below nominal. When  
using ICs rated at only the nominal supply ±5%, this leaves a zone of uncertainty  
where the supply is between 5% and 10% low, and where the reset may or may not be  
asserted.  
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