Datasheet > AN6092

AN6092

更新时间： 2023-12-20 18:45:52

品牌	Logo	应用领域
莱迪思 - LATTICE		/
页数	文件大小	规格书
17页	2930K
描述
Implementing VID Function with Platform Manager 2

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Implementing VID Function with Platform Manager 2

After establishing the hardware connection, the following is the sequence of action for the VID operation:

1. The Platform Designer tool is used to configure and connect the VID module and create a VID Lookup Table,

which is a set of target voltages for the power supply module.

2. The CPU/Controller provides the Voltage Identification Code (VID) on the VID select bus. The VID code is

decoded by the VID module and determines the target voltage from the VID Lookup Table.

3. The CPU/Controller also provides a VID Strobe signal. The VID strobe signal loads the selected target voltage

from the table to the VID setpoint register inside TrimCell.

4. The VOUT of the power supply module is read by CLT logic circuit after ADC conversion. The CLT logic com-

pares resultant ADC value with the VID Setpoint and adjusts the 8-bit DAC output, which provides the trimming

voltage required to set the output voltage.

5. The CLT continuously monitors the VOUT and adjusts the VTRIM so that the VOUT equals the VID target volt-

age.

Another VID target Setpoint voltage from the VID Lookup Table can be selected by the CPU/Controller after chang-

ing VID code and providing VID strobe signal. The CLT repeats the action of comparing and adjusts the DAC for

this new VID target voltage output. The TrimCell which provides the trimming voltage for the VID operation is

explained in next section.

TrimCell

The block diagram of a TrimCell inside an L-ASC10 which implements the VID function is shown in Figure 2.

Figure 2. TrimCell Internal Block Diagram

ASCx

DAC PROFILE MUX

OUTPUT

TrimCell

TRIMx UPDATE

POLARITY

(Configuration Memory)

TRIMx BYPASS

CONTROL

Profile2

Profile1

(Configuration Memory)

Three-State

DIGITAL

COMPARE

(+1/0/-1)

+/-1

TRIMy

Profile0 /

VID Target Voltage

DAC

TRIM

DC-DC

CONVERTER

UPDATE

RATE

VMONy

CONTROL

ASC I²C Write

(Configuration Setting)

VOUT

GND

ADC

TRIMy_P0, TRIMy_P1

I²C Controller

CLT UPDATE RATE*

TRIMy_CLTE

(Configuration Memory)

(ASC Interface)

Each TrimCell consists of a programmable Voltage Setpoint Register, closed loop trim control logic and one DAC at

the output. Profile0, Profile1 and Profile2 are 12-bit setpoints, which are written in the EEPROM memory during

programming. The active profile for each TrimCell is independently chosen based on profile select signals

TRIMy_P0 / TRIMy_P1. The closed Loop Trim Logic controls the DAC which provides the analog voltage output at

the TRIMy pin of the device. The full scale output voltage of the 8-bit DAC is equal to bi-polar zero voltage (Vbpz)

+/-320 mV, the Vbpz may be set to 0.6 V, 0.8 V, 1.0 V or 1.25 V. Each ASC has four TrimCells with outputs TRIM1,

TRIM2, TRIM3 and TRIM4 available for VID operation. Thus, each L-ASC10 can support four different VID chan-

nels connected to four DC-DC converters.

123 4 5 6 7...17

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