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AS1152-T PDF预览

AS1152-T

更新时间: 2024-02-18 18:20:13
品牌 Logo 应用领域
艾迈斯 - AMSCO 驱动器
页数 文件大小 规格书
15页 146K
描述
Quad LVDS Driver

AS1152-T 技术参数

生命周期:ActiveReach Compliance Code:unknown
风险等级:5.71Base Number Matches:1

AS1152-T 数据手册

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austriamicrosystems  
Data Sheet  
AS1152  
Quad LVDS Driver  
1 General Description  
2 Key Features  
!
The AS1152 is a Quad Flow-Through LVDS (Low-Volt-  
age Differential Signaling) Line Driver which accepts  
and converts LVTTL/LVCMOS input levels into LVDS  
output signals. The device is perfect for low-power low-  
noise applications requiring high signaling rates and  
reduced EMI emissions.  
Flow-Through Pinout  
!
Guaranteed 500Mbps Data Rate (paired with  
AS1150)  
!
!
!
!
!
350ps Pulse Skew (Max)  
Conforms to ANSI TIA/EIA-644 LVDS Standards  
Single +3.3V Supply  
The device is guaranteed to transmit data at speeds up  
to 500Mbps (250MHz) over controlled impedance media  
of approximately 100. Supported transmission media  
are PCB traces, backplanes, and cables.  
Operating Temperature Range: -40 to +85°C  
16-Pin TSSOP Package  
The AS1152 is capable of setting all four outputs to a  
high-impedance state through two Enable Inputs (EN  
and ENn – internally pulled down to GND), dropping the  
device to an ultra-low-power state of 16mW (typical) dur-  
ing high impedance. The Enable Inputs are common to  
all four drivers.  
3 Applications  
Digital Copiers, Laser Printers, Cellular Phone Base Sta-  
tions, Add/Drop Muxes, Digital Cross-Connects,  
DSLAMs, Network Switches/Routers, Backplane Inter-  
connect, Clock Distribution Computers, Intelligent Instru-  
ments, Controllers, Critical Microprocessors and  
Microcontrollers, Power Monitoring, and Portable/Bat-  
tery-Powered Equipment.  
Outputs conform to the ANSI TIA/EIA-644 LVDS stan-  
dards. Flow-through pinout simplifies PC board layout  
and reduces crosstalk by separating the LVTTL/LVC-  
MOS inputs and LVDS outputs.  
The AS1152 operates from a single +3.3V supply and is  
specified for operation from -40 to +85°C.  
Figure 1. Block Diagram  
VCC  
OUT1+  
OUT1-  
IN1  
IN2  
IN3  
OUT2+  
OUT2-  
OUT3+  
OUT3-  
OUT4+  
OUT4-  
IN4  
EN  
ENn  
AS1152  
www.austriamicrosystems.com  
Revision 1.00  
1 - 15  

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