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AM29DL800BB90EC

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品牌 Logo 应用领域
超微 - AMD 闪存内存集成电路光电二极管
页数 文件大小 规格书
43页 545K
描述
8 Megabit (1 M x 8-Bit/512 K x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory

AM29DL800BB90EC 技术参数

是否Rohs认证: 不符合生命周期:Transferred
零件包装代码:TSOP1包装说明:TSOP1, TSSOP48,.8,20
针数:48Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.51
风险等级:5.14Is Samacsys:N
最长访问时间:90 ns其他特性:MINIMUM 1000K PROGRAM/ERASE CYCLES; CAN ALSO BE CONFIGURED AS 512K X 16
备用内存宽度:8启动块:BOTTOM
命令用户界面:YES数据轮询:YES
JESD-30 代码:R-PDSO-G48JESD-609代码:e0
长度:18.4 mm内存密度:8388608 bit
内存集成电路类型:FLASH内存宽度:16
功能数量:1部门数/规模:2,4,2,14
端子数量:48字数:524288 words
字数代码:512000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:512KX16输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TSOP1
封装等效代码:TSSOP48,.8,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE并行/串行:PARALLEL
电源:3/3.3 V编程电压:3 V
认证状态:Not Qualified就绪/忙碌:YES
座面最大高度:1.2 mm部门规模:16K,8K,32K,64K
最大待机电流:0.000005 A子类别:Flash Memories
最大压摆率:0.045 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL切换位:YES
类型:NOR TYPE宽度:12 mm
Base Number Matches:1

AM29DL800BB90EC 数据手册

 浏览型号AM29DL800BB90EC的Datasheet PDF文件第2页浏览型号AM29DL800BB90EC的Datasheet PDF文件第3页浏览型号AM29DL800BB90EC的Datasheet PDF文件第4页浏览型号AM29DL800BB90EC的Datasheet PDF文件第5页浏览型号AM29DL800BB90EC的Datasheet PDF文件第6页浏览型号AM29DL800BB90EC的Datasheet PDF文件第7页 
PRELIMINARY  
Am29DL800B  
8 Megabit (1 M x 8-Bit/512 K x 16-Bit)  
CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory  
DISTINCTIVE CHARACTERISTICS  
Simultaneous Read/Write operations  
Sector protection  
— Host system can program or erase in one bank,  
then immediately and simultaneously read from  
the other bank  
— Hardware method of locking a sector to prevent  
any program or erase operation within that  
sector  
— Zero latency between read and write operations  
— Read-while-erase  
— Sectors can be locked in-system or via  
programming equipment  
Temporary Sector Unprotect feature allows code  
changes in previously locked sectors  
— Read-while-program  
Single power supply operation  
Top or bottom boot block configurations  
— Full voltage range: 2.7 to 3.6 volt read and write  
operations for battery-powered applications  
available  
Embedded Algorithms  
Manufactured on 0.35 µm process technology  
— Embedded Erase algorithm automatically  
pre-programs and erases sectors or entire chip  
— Compatible with 0.5 µm Am29DL800 device  
High performance  
— Embedded Program algorithm automatically  
programs and verifies data at specified address  
— Access times as fast as 70 ns  
Low current consumption (typical values  
Minimum 1,000,000 program/erase cycles  
at 5 MHz)  
guaranteed per sector  
— 7 mA active read current  
Package options  
— 44-pin SO  
— 21 mA active read-while-program or read-while-  
erase current  
— 48-pin TSOP  
— 48-ball FBGA  
— 17 mA active program-while-erase-suspended  
current  
Compatible with JEDEC standards  
— 200 nA in standby mode  
— Pinout and software compatible with  
single-power-supply flash standard  
— 200 nA in automatic sleep mode  
— Standard tCE chip enable access time applies to  
transition from automatic sleep mode to active  
mode  
— Superior inadvertent write protection  
Data# Polling and Toggle Bits  
Flexible sector architecture  
— Provides a software method of detecting  
program or erase cycle completion  
Two 16 Kword, two 8 Kword, four 4 Kword, and  
fourteen 32 Kword sectors in word mode  
Ready/Busy# output (RY/BY#)  
Two 32 Kbyte, two 16 Kbyte, four 8 Kbyte, and  
fourteen 64 Kbyte sectors in byte mode  
— Hardware method for detecting program or  
erase cycle completion  
— Any combination of sectors can be erased  
— Supports full chip erase  
Erase Suspend/Erase Resume  
— Suspends or resumes erasing sectors to allow  
reading and programming in other sectors  
Unlock Bypass Program Command  
— Reduces overall programming time when  
issuing multiple program command sequences  
— No need to suspend if sector is in the other bank  
Hardware reset pin (RESET#)  
— Hardware method of resetting the device to  
reading array data  
This document contains information on a product under development at Advanced Micro Devices. The information  
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed  
product without notice.  
Publication# 21519 Rev: A Amendment/+3  
Issue Date: April 1998  

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8 Megabit (1 M x 8-Bit/512 K x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Me