AM1806
SPRS658B–FEBRUARY 2010–REVISED MAY 2010
www.ti.com
• Two Multichannel Buffered Serial Ports:
– Transmit/Receive Clocks
• One 64-bit General-Purpose/Watchdog Timer
(Configurable as Two 32-bit General-Purpose
Timers)
• Two Enhanced Pulse Width Modulators
(eHRPWM):
– Two Clock Zones and 16 Serial Data Pins
– Supports TDM, I2S, and Similar Formats
– AC97 Audio Codec Interface
– Telecom Interfaces (ST-Bus, H100)
– 128-channel TDM
– Dedicated 16-Bit Time-Base Counter With
Period And Frequency Control
– 6 Single Edge, 6 Dual Edge Symmetric or 3
Dual Edge Asymmetric Outputs
– Dead-Band Generation
– PWM Chopping by High-Frequency Carrier
– Trip Zone Input
– FIFO buffers for Transmit and Receive
• Video Port Interface (VPIF):
– Two 8-bit SD (BT.656), Single 16-bit or Single
Raw (8-/10-/12-bit) Video Capture Channels
– Two 8-bit SD (BT.656), Single 16-bit Video
Display Channels
• Three 32-Bit Enhanced Capture Modules
(eCAP):
• Universal Parallel Port (uPP):
– Configurable as 3 Capture Inputs or 3
Auxiliary Pulse Width Modulator (APWM)
outputs
– Single Shot Capture of up to Four Event
Time-Stamps
– High-Speed Parallel Interface to FPGAs and
Data Converters
– Data Width on Each of Two Channels is 8- to
16-bit Inclusive
– Single Data Rate or Dual Data Rate Transfers
– Supports Multiple Interfaces with START,
ENABLE and WAIT Controls
• 361-Ball Pb-Free Plastic Ball Grid Array (PBGA)
[ZCE Suffix], 0.65-mm Ball Pitch
• Commercial or Extended Temperature
• Community Resources
• Real-Time Clock With 32 KHz Oscillator and
Separate Power Rail
• Three One 64-Bit General-Purpose Timers
(Configurable as Two 32-Bit Timers)
– TI E2E Community
– TI Embedded Processors Wiki
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AM1806 ARM Microprocessor
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