AK8813VG

更新时间： 2024-02-16 20:11:02

品牌	Logo	应用领域
AKM		编码器
页数	文件大小	规格书
51页	421K
描述
NTSC/PAL Digital Video Encoder

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数据手册

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AK8813VG 数据手册

ASAHIKASEI

[AK8813/14]

Video data input

Digital Power Supply

DVDD

DVSS

Digital Ground

Open for normal operation

Video data input

TEST

Open for normal operation

The slave address is set with this pin.

“L”:40H “H”:42H

SELA

Serial interface clock

Serial interface data

SCL

SDA

I/O

Power Down Pin. After returning from PD mode to normal operation,

RESET Sequence should be done to AK8813/14.

After this pin becomes “L”, AK8813/14 starts the internal initializing

sequence.

After initializing sequence, AK8813/14 is set NTSC mode, Rec.656

decoding mode. All DACs Off condition.

/RESET

After power up, AK8813/14 must be initialized with this pin.

(27MHz Clock is necessary for reset sequence.)

Analog Ground

AVSS

Open for normal operation

Output of Luminance Signal.

Analog Power Supply

Output of the Chrominance signal

Analog Ground

AVDD

AVSS

CVBS

Output of Composite Video signal

Open for normal operation

(Note1) At ITU-R.BT656 I/F mode operation, FID/VSYNC, HSYNC pins should be pulled up to VDD with

100k-ohm Resistor

(Note2) This device requires reset operation. Before resetting the state of the pin of I/O are unknown state. After

reset sequence, I/Opins (FID/VSYNC, HSYNC) turns Hi-Z states.

Rev.00

- 8 -

2004/Oct

1...4 5 678 9 10...51

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