Datasheet > 可编程逻辑 > 现场可编程门阵列> AGLN010V5-QNG48I

AGLN010V5-QNG48I

更新时间： 2024-02-13 10:11:01

品牌	Logo	应用领域
ACTEL		栅现场可编程门阵列可编程逻辑
页数	文件大小	规格书
140页	4325K
描述
Field Programmable Gate Array, 260 CLBs, 10000 Gates, 250MHz, 260-Cell, CMOS, 6 X 6 MM, 0.9 MM HEIGHT, 0.4 MM PITCH, GREEN, QFN-48

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AGLN010V5-QNG48I 数据手册

Revision 10

IGLOO nano Low Power Flash FPGAs

with Flash*Freeze Technology

High-Performance Routing Hierarchy

Features and Benefits

•

Segmented, Hierarchical Routing and Clock Structure

Low Power

Advanced I/Os

•

nanoPower Consumption—Industry’s Lowest Power

1.2 V to 1.5 V Core Voltage Support for Low Power

Supports Single-Voltage System Operation

•

1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V Mixed-Voltage Operation

Bank-Selectable I/O Voltages—up to 4 Banks per Chip

Single-Ended I/O Standards: LVTTL, LVCMOS

3.3 V / 2.5 V / 1.8 V / 1.5 V / 1.2 V

Low Power Active FPGA Operation

Flash*Freeze Technology Enables Ultra-Low Power

Consumption while Maintaining FPGA Content

Easy Entry to / Exit from Ultra-Low Power Flash*Freeze Mode

•

Wide Range Power Supply Voltage Support per JESD8-B,

Allowing I/Os to Operate from 2.7 V to 3.6 V

Wide Range Power Supply Voltage Support per JESD8-12,

Allowing I/Os to Operate from 1.14 V to 1.575 V

I/O Registers on Input, Output, and Enable Paths

Selectable Schmitt Trigger Inputs

•

Small Footprint Packages

•

As Small as 3x3 mm in Size

Wide Range of Features

Hot-Swappable and Cold-Sparing I/Os

•

10,000 to 250,000 System Gates

Up to 36 kbits of True Dual-Port SRAM

Up to 71 User I/Os

Programmable Output Slew Rate and Drive Strength

Weak Pull-Up/-Down

IEEE 1149.1 (JTAG) Boundary Scan Test

Pin-Compatible Packages across the IGLOO Family

Reprogrammable Flash Technology

Clock Conditioning Circuit (CCC) and PLL^†

•

130-nm, 7-Layer Metal, Flash-Based CMOS Process

Live-at-Power-Up (LAPU) Level 0 Support

Single-Chip Solution

Retains Programmed Design When Powered Off

250 MHz (1.5 V systems) and 160 MHz (1.2 V systems) System

Performance

Up to Six CCC Blocks, One with an Integrated PLL

Configurable Phase Shift, Multiply/Divide, Delay

Capabilities, and External Feedback

•

Wide Input Frequency Range (1.5 MHz up to 250 MHz)

Embedded Memory

In-System Programming (ISP) and Security

•

1 kbit of FlashROM User Nonvolatile Memory

•

Secure ISP Using On-Chip 128-Bit Advanced Encryption

Standard (AES) Decryption via JTAG (IEEE 1532–compliant)

SRAMs and FIFOs with Variable-Aspect-Ratio 4,608-Bit RAM

†

Blocks (×1, ×2, ×4, ×9, and ×18 organizations)

True Dual-Port SRAM (except × 18 organization)

†

•

FlashLock to Secure FPGA Contents

•

1.2 V Programming

Enhanced Commercial Temperature Range

•

–20°C to +70°C

Table 1 • IGLOO nano Devices

IGLOO nano Devices

AGLN010 AGLN015 AGLN020

AGLN060 AGLN125 AGLN250

AGLN030Z¹AGLN060Z AGLN125Z AGLN250Z

IGLOO nano-Z Devices

System Gates

10K

260

15K

128

384

20K

172

520

30K

256

768

60K

512

1,536

125K

1,024

3,072

250K

2,048

6,144

Typical Equivalent Macrocells

VersaTiles (D-flip-flops)

Flash*Freeze Mode (typical, µW)

RAM kbits (1,024 bits)

–

4,608-Bit Blocks

–

FlashROM Bits

1 k

–

1 k

–

1 k

–

1 k

–

1 k

Yes

1 k

Yes

1 k

Yes

Secure (AES) ISP

2,3

Integrated PLL in CCCs

–

VersaNet Globals

I/O Banks

Maximum User I/Os (packaged device)

Maximum User I/Os (Known Good Die)

–

Package Pins

UC/CS

UC36

QN48

UC81,

CS81

QN68

UC81, CS81

QN48, QN68

VQ100

CS81

QFN

VQFP

QN68

VQ100

Notes:

1. AGLN030 is available in the Z feature grade only.

2. AGLN030 and smaller devices do not support this feature.

3. AGLN060, AGLN125, and AGLN250 in the CS81 package do not support PLLs.

4. For higher densities and support of additional features, refer to the IGLOO and IGLOOe handbooks.

† AGLN030 and smaller devices do not support this feature.

April 2010

12 3 4 5 6 7...140

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与AGLN010V5-QNG48I相关器件

型号	品牌	获取价格	描述	数据表
AGLN010V5-QNG48Y	MICROSEMI	获取价格	Field Programmable Gate Array, 260 CLBs, 10000 Gates, 250MHz, 260-Cell, CMOS
AGLN010V5-QNG48YI	MICROSEMI	获取价格	FPGA
AGLN010V5-QNG81	MICROSEMI	获取价格	IGLOO nano Low Power Flash FPGAs with Flash*Freeze Technology
AGLN010V5-QNG81ES	MICROSEMI	获取价格	IGLOO nano Low Power Flash FPGAs with Flash*Freeze Technology
AGLN010V5-QNG81I	MICROSEMI	获取价格	IGLOO nano Low Power Flash FPGAs with Flash*Freeze Technology
AGLN010V5-QNG81PP	MICROSEMI	获取价格	IGLOO nano Low Power Flash FPGAs with Flash*Freeze Technology
AGLN010V5-QNG81Y	MICROSEMI	获取价格	IGLOO nano Low Power Flash FPGAs with Flash*Freeze Technology
AGLN010V5-QNG81YES	MICROSEMI	获取价格	IGLOO nano Low Power Flash FPGAs with Flash*Freeze Technology
AGLN010V5-QNG81YI	MICROSEMI	获取价格	IGLOO nano Low Power Flash FPGAs with Flash*Freeze Technology
AGLN010V5-QNG81YPP	MICROSEMI	获取价格	IGLOO nano Low Power Flash FPGAs with Flash*Freeze Technology

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