AFE78101, AFE88101
ZHCSP80 –DECEMBER 2022
www.ti.com.cn
6.5 Electrical Characteristics (continued)
all minimum and maximum values at TA = –40°C to +125°C and all typical values at TA = 25°C, PVDD = VDD = IOVDD =
1.8 V, external or internal VREFIO = 1.25 V, RLOAD = 50 kΩto GND, CLOAD = 100 pF to GND, and digital inputs at IOVDD or
GND (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VOUT DAC OUTPUT CHARACTERISTICS
RANGE = 0, PVDD = VDD
0.15
0.2
1.25
1.0
RANGE = 1, PVDD = VDD
Output voltage range
V
RANGE = 0, PVDD > 2.7 V, VDD generated
RANGE = 1, PVDD > 2.7 V, VDD generated
PVDD > 2.7 V, VDD internally generated
PVDD = VDD
0.3
2.5
0.4
2.0
2.5
1.25
0.3
+6%
+6%
+5%
+5%
–6%
–6%
–5%
–5%
10
VOUT alarm output high
VOUT alarm output low
V
V
PVDD > 2.7 V, VDD internally generated
PVDD = VDD
0.15
RLOAD
CLOAD
Resistive load(2)
Capacitive load(2)
Load regulation
kΩ
pF
100
10
5
µV/mA
DAC at midscale, –1 mA ≤IOUT ≤+1 mA
Full scale output shorted to GND
Zero output shorted to VDD
Short-circuit current
mA
5
Output voltage headroom to PVDD
Output voltage footroom to GND
DAC at full code, IOUT = 1 mA (sourcing)
DAC at zero code, IOUT = 1 mA (sinking)
DAC at midscale
200
200
mV
mV
10
500
0.1
±5
mΩ
ZO
DC small signal output impedance
Output Hi-Z
kΩ
Power supply rejection ratio (dc)
DAC at midscale; PVDD = 1.8 V ± 10%
TA = 35°C, VOUT = midscale, ideal VREF
mV/V
ppm FSR
Output voltage drift vs time, 1000 hours
DIAGNOSTIC ADC
PVDD = VDD
PVDD > 2.7 V
0
0
1.25
2.5
Input voltage range
V
Resolution
12
±0.2
±1
Bits
LSB
LSB
LSB
%FSR
LSB
pF
DNL
INL
OE
Differential nonlinearity
Integral nonlinearity
Offset error
Specified 12-bit monotonic
After calibration
1
4
–1
–4
±1.6
±0.13
±4
10
0.8
–10
–0.8
GE
Gain error
Noise
Input capacitance
Input bias current
Acquisition time
Conversion time
Conversion rate
Temperature sensor accuracy
6
ADC not converting
50
3.84
nA
–50
52
µs
210
µs
kSPS
°C
5
INTERNAL OSCILLATOR
Frequency
1.2165
1.2288
1.2411
MHz
TA = –40°C to +125°C
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