Application Information
Data Line Interconnections
optical power (dBm avg) and
the lowest receiver sensitivity
(dBm avg). This OPB provides
the necessary optical signal
range to establish a working
fiber-optic link. The OPB is
allocated for the fiber-optic
cable length and the
corresponding link penalties.
For proper link performance,
all penalties that affect the
link performance must be
accounted for within the link
optical power budget.
The Applications Engineering
Group at Agilent is available
to assist you with technical
understanding and design
trade-offs associated with
these transceivers. You can
contact them through your
Agilent sales representative.
Agilent’s AFCT-5964TLZ/TGZ/
ATLZ/ATGZ/NLZ/NGZ fiber-
optic transceivers are designed
to couple to +3.3 V PECL
signals. The transmitter driver
circuit regulates the output
optical power. The regulated
light output will maintain a
constant output optical power
provided the data pattern is
reasonably balanced in duty
cycle. If the data duty cycle
has long, continuous state
times (low or high data duty
cycle), then the output optical
power will gradually change its
average output optical power
level to its preset value.
The following information is
provided to answer some of
the most common questions
about the use of the parts.
Optical Power Budget and
Link Penalties
Electrical and Mechanical Interface
Recommended Circuit
The worst-case Optical Power
Budget (OPB) in dB for a
fiber-optic link is determined
by the difference between the
minimum transmitter output
Figures 6a and 6b show
recommended dc and ac
coupled circuits for deploying
the Agilent transceivers in +3.3
V systems.
PHY DEVICE
VCC (+3.3 V)
TERMINATE AT
TRANSCEIVER INPUTS
Z = 5± Ω
Z = 5± Ω
TDIS (LVTTL)
ꢀ±± Ω
ꢀ3± Ω
BMON
-
TD-
BMON
PMON
PMON
+
LVPECL
ꢀ3± Ω
-
TD+
+
2± ꢀ9 ꢀ8 ꢀ7 ꢀ6 ꢀ5 ꢀ4 ꢀ3 ꢀ2 ꢀꢀ
VCC (+3.3 V)
ꢀ µH
TX
C5 *
ꢀ± µF
C2
C3
ꢀ± µF
VCC (+ 3.3 V)
RX
ꢀ µH
RD+
RD-
C4 *
ꢀ± µF
Cꢀ
ꢀ
2
3
4
5
6
7
8
9 ꢀ±
Z = 5± Ω
Z = 5± Ω
ꢀ±± Ω
VCC RX (+ 3.3 V)
LVPECL
2±± Ω
NOTE A
ꢀ± nF
ꢀ3± Ω
ꢀ3± Ω
Z = 5± Ω
SD
LVTTL
Note: Cꢀ = C2 = C3 = ꢀ± nF or ꢀ±± nF
Note A: THE BIAS RESISTOR FOR VpdR SHOULD NOT EXCEED 2±±
* C4 AND C5 ARE OPTIONAL BYPASS CAPACI TORS FOR ADDITI ONAL
LOW FREQUENCY NOISE FILTERING.
W
TERMI NATE AT
DEVICE INPUTS
Figure 6a. Recommended dc coupled interface circuit
7