SDH test pattern at 155 Mb/s
without significant distortion
or performance penalty. If a
lower signal rate, or a code
which has significantly more
low frequency content is used,
sensitivity, jitter and pulse
distortion could be degraded.
Functional Description
Receiver Section
Noise Immunity
The receiver includes internal
circuit components to filter
power supply noise. However
under some conditions of EMI
and power supply noise,
external power supply filtering
may be necessary (see
Design
The receiver section for the
AFCT-5963TLZ/TGZ/ATLZ/
ATGZ/NLZ/NGZ contains an
InGaAs/InP photo detector and
a preamplifier mounted in an
optical subassembly. This
optical subassembly is coupled
to a postamp/decision circuit
on a circuit board. The design
of the optical assembly is such
that it provides better than 14
dB Optical Return Loss (ORL).
Application Section).
Figure 1 also shows a filter
function which limits the
bandwidth of the preamp
output signal. The filter is
designed to bandlimit the
preamp output noise and thus
improve the receiver
The Signal Detect Circuit
The signal detect circuit works
by sensing the level of the
received signal and comparing
this level to a reference. The
SD output is +3.3 V TTL.
sensitivity.
The postamplifier is ac coupled
to the preamplifier as
illustrated in Figure 1. The
coupling capacitors are large
enough to pass the SONET/
These components will reduce
the sensitivity of the receiver
as the signal bit rate is
increased above 155 Mb/s.
DATA OUT
FILTER
TRANS-
IMPEDANCE
PRE-
LVPECL
OUTPUT
BUFFER
AMPLIFIER
AMPLIFIER
DATA OUT
GND
LVTTL
OUTPUT
BUFFER
SIGNAL
DETECT
CIRCUIT
SD
Figure 1. Receiver Block Diagram
2