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ADuM4473ARIZ

更新时间： 2024-02-12 06:06:53
品牌 Logo 应用领域
亚德诺 - ADI 稳压器开关
页数 文件大小 规格书
36页 750K
描述
Isolated Switching Regulator with Quad-Channel Isolators

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ADuM4473ARIZ 技术参数

Source Url Status Check Date：2013-05-01 14:56:51.07是否无铅： 含铅
是否Rohs认证： 符合生命周期：Active
包装说明：SOP, SOP20,.4针数：20
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.74
其他特性：ALSO WORKS WITH 5 V INPUT;VOUT=(3.3-24 VOLT)模拟集成电路 - 其他类型：SWITCHING REGULATOR
控制技术：PULSE WIDTH MODULATION最大输入电压：3.6 V
最小输入电压：3 V标称输入电压：3.3 V
JESD-30 代码：R-PDSO-G20JESD-609代码：e3
长度：15.3 mm湿度敏感等级：3
功能数量：1端子数量：20
最高工作温度：105 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP20,.4封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：260
电源：5 V认证状态：Not Qualified
座面最大高度：2.64 mm子类别：Other Analog ICs
标称供电电压 (Vsup)：5 V表面贴装：YES
最大切换频率：515 kHz技术：DMOS
温度等级：INDUSTRIAL端子面层：Matte Tin (Sn)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：30
宽度：7.5 mm

ADuM4473ARIZ 数据手册

 浏览型号ADuM4473ARIZ的Datasheet PDF文件第4页浏览型号ADuM4473ARIZ的Datasheet PDF文件第5页浏览型号ADuM4473ARIZ的Datasheet PDF文件第6页浏览型号ADuM4473ARIZ的Datasheet PDF文件第8页浏览型号ADuM4473ARIZ的Datasheet PDF文件第9页浏览型号ADuM4473ARIZ的Datasheet PDF文件第10页 
Data Sheet  
ADuM4470/ADuM4471/ADuM4472/ADuM4473/ADuM4474  
Parameter  
Symbol  
Min  
Typ  
Max  
Unit  
Test Conditions/Comments  
Logic High Output Voltages  
VOAH, VOBH  
VOCH, VODH  
,
VDDA − 0.3,  
VISO − 0.3  
3.3  
V
IOx = −20 µA, VIx = VIxH  
VDDA − 0.5,  
VISO − 0.5  
3.1  
0.0  
0.0  
V
V
V
I
I
Ox = −4 mA, VIx = VIxH  
Ox = 20 µA, VIx = VIxH  
Logic Low Output Voltages  
VOAL, VOBL  
VOCL, VODL  
,
0.1  
0.4  
IOx = 4 mA, VIx = VIxH  
AC SPECIFICATIONS  
ADuM447xARIZ  
Minimum Pulse Width  
Maximum Data Rate  
Propagation Delay  
Pulse Width Distortion, |tPLH − tPHL  
Propagation Delay Skew  
Channel-to-Channel Matching  
ADuM447xCRIZ  
PW  
1000  
ns  
Mbps  
ns  
ns  
ns  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
1
tPLH, tPHL  
PWD  
tPSK  
60  
100  
40  
50  
|
tPSKCD/tPSKOD  
50  
ns  
Minimum Pulse Width  
Maximum Data Rate  
Propagation Delay  
Pulse Width Distortion, |tPLH − tPHL  
Change vs. Temperature  
Propagation Delay Skew  
Channel-to-Channel Matching,  
Codirectional Channels  
Channel-to-Channel Matching,  
PW  
40  
ns  
Mbps  
ns  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
25  
30  
tPLH, tPHL  
PWD  
60  
5
70  
8
|
ns  
ps/°C  
ns  
ns  
tPSK  
tPSKCD  
45  
8
tPSKCD  
15  
ns  
CL = 15 pF, CMOS signal levels  
Opposing Directional Channels  
Output Rise/Fall Time (10% to 90%)  
Common-Mode Transient Immunity  
at Logic High Output  
Common-Mode Transient Immunity  
at Logic Low Output  
tR/tF  
|CMH|  
2.5  
35  
ns  
kV/µs  
CL = 15 pF, CMOS signal levels  
VIx = VDDA or VISO, VCM = 1000 V,  
transient magnitude = 800 V  
VIx = 0 V or VISO, VCM = 1000 V,  
transient magnitude = 800 V  
25  
25  
|CML|  
35  
kV/µs  
Mbps  
Refresh Rate  
fr  
1.0  
1 VDD1 is the power supply for the push-pull transformer.  
2 VDDA is the power supply of Side 1 of the ADuM447x.  
3 The contributions of supply current values for all four channels are combined at identical data rates.  
4 The VISO supply current is available for external use when all data rates are below 2 Mbps. At data rates above 2 Mbps, the data I/O channels draw additional current  
proportional to the data rate. Additional supply current associated with an individual channel operating at a given data rate can be calculated as described in the  
Power Consumption section. The dynamic I/O channel load must be treated as an external load and included in the VISO power budget.  
5 The power demands of the quiescent operation of the data channels were not separated from the power supply section. Efficiency includes the quiescent power  
consumed by the I/O channels as part of the internal power consumption.  
6 This current is available for driving external loads at the VISO output. All channels are simultaneously driven at a maximum data rate of 25 Mbps with full capacitive  
load representing the maximum dynamic load conditions. Refer to the Power Consumption section for calculation of available current at less than the maximum  
data rate.  
Rev. 0 | Page 7 of 36  
 
1...45678910...36

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