ADuM1300/ADuM1301
Data Sheet
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—5 V, 105°C OPERATION
All voltages are relative to their respective ground. 4.5 V ≤ VDD1 ≤ 5.5 V, 4.5 V ≤ VDD2 ≤ 5.5 V; all minimum/maximum specifications apply
over the entire recommended operation range, unless otherwise noted; all typical specifications are at TA = 25°C, VDD1 = VDD2 = 5 V. These
specifications do not apply to ADuM1300W and ADuM1301W automotive grade versions.
Table 1.
Parameter
Symbol
Min
Typ
Max Unit
Test Conditions
DC SPECIFICATIONS
Input Supply Current per Channel, Quiescent
Output Supply Current per Channel, Quiescent
ADuM1300 Total Supply Current, Three Channels1
DC to 2 Mbps
IDDI (Q)
IDDO (Q)
0.50 0.53 mA
0.19 0.24 mA
VDD1 Supply Current
VDD2 Supply Current
IDD1 (Q)
IDD2 (Q)
1.6
0.7
2.5
1.0
mA
mA
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
10 Mbps (BRW and CRW Grades Only)
VDD1 Supply Current
VDD2 Supply Current
IDD1 (10)
IDD2 (10)
6.5
1.9
8.1
2.5
mA
mA
5 MHz logic signal freq.
5 MHz logic signal freq.
90 Mbps (CRW Grade Only)
VDD1 Supply Current
VDD2 Supply Current
IDD1 (90)
IDD2 (90)
57
16
77
18
mA
mA
45 MHz logic signal freq.
45 MHz logic signal freq.
ADuM1301 Total Supply Current, Three Channels1
DC to 2 Mbps
VDD1 Supply Current
VDD2 Supply Current
IDD1 (Q)
IDD2 (Q)
1.3
1.0
2.1
1.4
mA
mA
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
10 Mbps (BRW and CRW Grades Only)
VDD1 Supply Current
VDD2 Supply Current
IDD1 (10)
IDD2 (10)
5.0
3.4
6.2
4.2
mA
mA
5 MHz logic signal freq.
5 MHz logic signal freq.
90 Mbps (CRW Grade Only)
VDD1 Supply Current
VDD2 Supply Current
IDD1 (90)
IDD2 (90)
43
29
57
37
mA
mA
45 MHz logic signal freq.
45 MHz logic signal freq.
For All Models
Input Currents
IIA, IIB, IIC, IE1, IE2 −10
+0.01 +10 µA
V
0 V ≤ VIA, VIB, VIC ≤ VDD1 or VDD2
0 V ≤ VE1, VE2 ≤ VDD1 or VDD2
,
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
VIH, VEH
VIL, VEL
2.0
0.8
V
V
V
V
V
V
VOAH, VOBH, VOCH (VDD1 or VDD2) − 0.1 5.0
(VDD1 or VDD2) − 0.4 4.8
VOAL, VOBL, VOCL
IOx = −20 µA, VIx = VIxH
IOx = −4 mA, VIx = VIxH
IOx = 20 µA, VIx = VIxL
IOx = 400 µA, VIx = VIxL
IOx = 4 mA, VIx = VIxL
Logic Low Output Voltages
0.0
0.1
0.04 0.1
0.2
0.4
SWITCHING SPECIFICATIONS
ADuM1300ARW/ADuM1301ARW
Minimum Pulse Width2
PW
1000 ns
Mbps
100 ns
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
Maximum Data Rate3
1
50
Propagation Delay4
tPHL, tPLH
PWD
65
11
4
40
ns
Pulse Width Distortion, |tPLH − tPHL
|
Change vs. Temperature
ps/°C
ns
ns
Propagation Delay Skew5
tPSK
tPSKCD/tPSKOD
50
50
Channel-to-Channel Matching6
Rev. K | Page 4 of 32
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