ADuM1280/ADuM1281/ADuM1285/ADuM1286
Data Sheet
ELECTRICAL CHARACTERISTICS—MIXED 3 V/5 V OPERATION
All typical specifications are at TA = 25°C, VDD1 = 3.0 V, VDD2 = 5 V. Minimum/maximum specifications apply over the entire
recommended operation range: 2.7 V ≤ VDD1 ≤ 3.6 V, 4.5 V ≤ VDD2 ≤ 5.5 V; and −40°C ≤ TA ≤ 125°C; unless otherwise noted. Switching
specifications are tested with CL=15 pF and CMOS signal levels, unless otherwise noted.
Table 10.
A Grade
Typ
B Grade
Typ
C Grade
Typ
Parameter
Symbol
Min
Min
Min
Max
Min
10
Max
Unit
Test Conditions
SWITCHING SPECIFICATIONS
Pulse Width
PW
1000
40
Within PWD limit
ns
Data Rate
1
25
35
3
Within PWD limit
100
30
2.5
Mbps
ns
ns
ps/C
ns
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Propagation Delay Skew
tPHL, tPLH
PWD
50
10
16
50% input to 50% output
24
|tPLH − tPHL|
7
2
3
2
1.5
tPSK
38
16
Between any two units at
same operating conditions
12
Channel Matching
Codirectional
tPSKCD
tPSKOD
5
3
6
2.5
5
ns
ns
ns
Opposing-Direction
10
Jitter
1
7
Codirectional channel matchi ng is the absol ute value o f the diff erence in propa gation delays betwee n any two c hannels with i nputs on the same side of the isolati on barrier. Opposing-directio nal channel matching is the abs olute val ue o f the differe nce in propagati on delays betwee n any two c hannels wit h inputs on opposi ng sides of the is olation barrier.
Table 11.
1 Mbps–A, B, C Grade
25 Mbps–B, C Grade
100 Mbps–C Grade
Parameter
Symbol
Min
Typ
Min
Min
Typ
Max
Min
Typ
Max
Unit
Test Conditions
SUPPLY CURRENT
No load
ADuM1280/ADuM1285
IDD1
IDD2
IDD1
IDD2
mA
mA
mA
mA
0.75
2.7
1.6
1.4
4.5
2.1
2.3
5.1
4.8
3.8
3.9
9.0
7.0
5.0
6.2
17
9.5
11
11
23
15
15
15
ADuM1281/ADuM1286
1.7
Table 12. For All Models
Parameter
Symbol Min
Typ
Max
Unit
Test Conditions
DC SPECIFICATIONS
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
VIH
VIL
0.7 VDDx
V
0.3 VDDx
V
VOH
VDDx − 0.1
VDDx − 0.4
VDDx
VDDx − 0.2
0.0
V
V
V
V
IOx = −20 µA, VIx = VIxH
IOx = −4 mA, VIx = VIxH
IOx = 20 µA, VIx = VIxL
IOx = 4 mA, VIx = VIxL
0 V ≤ VIx ≤ VDDx
Logic Low Output Voltages
VOL
II
0.1
0.4
+10
0.2
Input Current per Channel
Supply Current per Channel
−10
µA
+0.01
Quiescent Input Supply Current
Quiescent Output Supply Current
Dynamic Input Supply Current
Dynamic Output Supply Current
IDDI(Q)
IDDO(Q)
IDDI(D)
IDDO(D)
0.75
2.0
mA
mA
0.4
1.6
0.08
mA/Mbps
mA/Mbps
0.03
Undervoltage-Lockout
Positive VDDX Threshold
Negative VDDX Threshold
VDDX Hysteresis
VDDxUV+
VDDxUV−
VDDxUVH
V
V
V
2.6
2.4
0.2
AC SPECIFICATIONS
Output Rise/Fall Time
Common-Mode Transient Immunity1
tR/tF
ns
10% to 90%
2.5
35
|CM|
25
kV/µs
VIx = VDDx, VCM = 1000 V,
transient magnitude = 800 V
Refresh Period
tr
µs
1.6
1|CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining Vo > 0.8 VDDX. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges.
Rev. 0 | Page 6 of 16