Datasheet > ADUM121N1WBRZ

ADUM121N1WBRZ

更新时间： 2022-02-26 09:40:30

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
19页	500K
描述
3.0 kV rms, Dual-Channel Digital Isolators

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ADUM121N1WBRZ 数据手册

Data Sheet

ADuM120N/ADuM121N

ELECTRICAL CHARACTERISTICS—3.3 V OPERATION

All typical specifications are at T_A= 25°C, V_DD1= V_DD2= 3.3 V. Minimum/maximum specifications apply over the entire recommended

operation range: 3.0 V ≤ V_DD1≤ 3.6 V, 3.0 V ≤ V_DD2≤ 3.6 V, and −40°C ≤ T_A≤ +125°C, unless otherwise noted. Switching specifications

are tested with C_L= 15 pF and CMOS signal levels, unless otherwise noted. Supply currents are specified with 50% duty cycle signals.

Table 3.

Parameter

Symbol

Min

Typ

Max

Unit

Test Conditions/Comments

SWITCHING SPECIFICATIONS

Pulse Width

Data Rate

Propagation Delay

Pulse Width Distortion

Change vs. Temperature

Propagation Delay Skew

6.6

150

4.8

Mbps

ps/°C

Within PWD limit

50% input to 50% output

|t_PLH− t_PHL|

t_PHL, t_PLH

PWD

6.8

0.7

1.5

t_PSK

7.0

Between any two units at the same

temperature, voltage, and load

Channel Matching

Codirectional

Opposing Direction

Jitter

t_PSKCD

t_PSKOD

0.7

290

3.0

ps p-p

ps rms

See the Jitter Measurement section

DC SPECIFICATIONS

Input Threshold Voltage

Logic High

V_IH

V_IL

0.7 × V_DDx

Logic Low

0.3 × V_DDx

Output Voltage

Logic High

V_OH

V_OL

I_I

V_DDx− 0.1

V_DDx− 0.4

V_DDx

V_DDx− 0.2

0.0

0.2

+0.01

I_Ox¹= −20 µA, V_Ix= V_IxH

I_Ox¹= −2 mA, V_Ix= V_IxH

Logic Low

0.1

0.4

+10

I_Ox¹= 20 µA, V_Ix= V_IxL

I_Ox¹= 2 mA, V_Ix= V_IxL

Input Current per Channel

Quiescent Supply Current

ADuM120N

−10

µA

0 V ≤ V_Ix≤ V_DDx

I_{DD1 (Q)}

I_{DD2 (Q)}

I_{DD1 (Q)}

I_{DD2 (Q)}

I_{DD1 (Q)}

I_{DD2 (Q)}

I_{DD1 (Q)}

I_{DD2 (Q)}

0.8

1.2

6.3

1.3

1.0

3.9

4.8

1.3

1.8

9.7

1.8

1.6

1.5

5.8

6.4

V_I⁴= 0 (N0), 1 (N1)⁵

V_I⁴= 1 (N0), 0 (N1)⁵

V_I⁴= 0 (N0), 1 (N1)⁵

V_I⁴= 01 (N0), 1 (N1)⁵

V_I⁴= 1 (N0), 0 (N1)⁵

ADuM121N

Dynamic Supply Current

Dynamic Input

Dynamic Output

Undervoltage Lockout

Positive V_DDxThreshold

Negative V_DDxThreshold

V_DDxHysteresis

I_{DDI (D)}

0.01

mA/Mbps

Inputs switching, 50% duty cycle

I_{DDO (D)}

UVLO

V_DDxUV+

V_DDxUV−

V_DDxUVH

1.6

1.5

0.1

Rev. A | Page 5 of 19

1 2 3 456 7 8...19

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