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ADUC7128BCPZ1262 PDF预览

ADUC7128BCPZ1262

更新时间: 2022-04-26 04:58:44
品牌 Logo 应用领域
亚德诺 - ADI 微控制器数据分配系统
页数 文件大小 规格书
92页 1808K
描述
Precision Analog Microcontroller ARM7TDMI MCU with 12-Bit ADC and DDS DAC

ADUC7128BCPZ1262 数据手册

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ADuC7128/ADuC7129  
Parameter  
Relative Accuracy  
Min  
Typ  
2
0.35  
−0.15  
Max  
Unit  
LSB  
LSB  
LSB  
mV  
mV  
μs  
Test Conditions/Comments  
Differential Nonlinearity, +VE  
Differential Nonlinearity, −VE  
Offset Error  
Gain Error  
Voltage Output Settling Time  
to 0.1%  
−190  
+150  
5
Line Driver Output  
As measured into a range of specified loads  
(see Figure 2) at LD1TX and LD2TX, unless  
otherwise noted  
Total Harmonic Distortion  
Output Voltage Swing  
COMMON MODE  
−52  
1.ꢀꢁ8  
dB  
V rms  
PLM operating at ꢁ91.2 kHz  
AC Mode  
1.ꢁ5  
1.5  
V
V
Each output has a common mode of 0.5 V × AVDD  
and swings 0.5 V × VREF above and below this;  
V
REF is the internal 2.5 V reference  
DC Mode  
Each output has a common mode of 0.5 V × VREF  
and swings 0.ꢁ V × VREF above and below this;  
VREF is the internal 2.5 V reference  
DIFFERENTIAL INPUT IMPEDANCE  
Leakage Current LD1TX, LD2TX  
Short-Circuit Current  
Line Driver Tx Power-Up Time  
COMPARATOR  
11  
13  
50  
kΩ  
μA  
mA  
ꢂs  
Line driver buffer disabled  
Line driver buffer disabled  
No protection diodes, max allowable current  
20  
Input Offset Voltage  
Input Bias Current  
15  
1
mV  
ꢂA  
Input Voltage Range  
Input Capacitance  
AGND  
2
AVDD − 1.2 V  
15  
1
pF  
mV  
Hysteresis3, 5  
Hysteresis can be turned on or off via the  
CMPHYST bit in the CMPCON register  
Response time can be modified via the CMPRES  
bits in the CMPCON register  
Response Time  
ꢂs  
TEMPERATURE SENSOR  
Voltage Output at 25°C  
Voltage Temperature Coefficient  
Accuracy  
ꢀ80  
−1.3  
3
mV  
mV/°C  
°C  
POWER SUPPLY MONITOR (PSM)  
IOVDD Trip Point Selection  
2.ꢀ9  
3.0ꢀ  
2.5  
V
V
%
ꢂs  
Two selectable trip points  
Power Supply Trip Point Accuracy  
GLITCH IMMUNITY ON RST PIN3  
Of the selected nominal trip point voltage  
50  
WATCHDOG TIMER (WDT)  
Timeout Period  
0
ms  
sec  
512  
FLASH/EE MEMORY, 8  
Endurance  
Data Retention  
DIGITAL INPUTS  
10,000  
20  
Cycles  
Years  
TJ = 85°C  
All digital inputs, including XCLKI and XCLKO  
Logic 1 Input Current (Leakage  
Current)  
Logic 0 Input Current (Leakage  
Current)  
0.2  
1
ꢂA  
μA  
VINH = VDD or VINH = 5 V  
−40  
−ꢁ5  
+125  
VINL = 0 V, except TDI  
VINL = 0 V, TDI Only  
−80  
15  
ꢂA  
pF  
Input Capacitance  
Rev. 0 | Page 5 of 92  

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