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ADSP-21363KBCZ-1AA

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亚德诺 - ADI /
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SHARC Processor

ADSP-21363KBCZ-1AA 数据手册

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ADSP-21362/ADSP-21363/ADSP-21364/ADSP-21365/ADSP-21366  
Debugging both C/C++ and assembly programs with the  
VisualDSP++ debugger, programmers can:  
ADSP-213xx  
100nF  
10nF  
1nF  
A
V
VDD  
DDINT  
• View mixed C/C++ and assembly code (interleaved source  
and object information)  
HI Z FERRITE  
BEAD CHIP  
• Insert breakpoints  
A
VSS  
• Set conditional breakpoints on registers, memory,  
and stacks  
LOCATE ALL COMPONENTS  
CLOSE TO A AND A PINS  
VDD  
VSS  
• Trace instruction execution  
• Perform linear or statistical profiling of program execution  
• Fill, dump, and graphically plot the contents of memory  
• Perform source level debugging  
Figure 4. Analog Power (AVDD) Filter Circuit  
and modification of memory, registers, and processor stacks.  
The processor’s JTAG interface ensures that the emulator will  
not affect target system loading or timing.  
• Create custom debugger windows  
The VisualDSP++ IDDE lets programmers define and manage  
DSP software development. Its dialog boxes and property pages  
let programmers configure and manage all of the SHARC devel-  
opment tools, including the color syntax highlighting in the  
VisualDSP++ editor. This capability permits programmers to:  
For complete information on Analog Devices’ SHARC DSP  
Tools product line of JTAG emulator operation, see the appro-  
priate “Emulator Hardware User’s Guide.”  
DEVELOPMENT TOOLS  
The ADSP-2136x is supported with a complete set of  
CROSSCORE®software and hardware development tools,  
including Analog Devices emulators and VisualDSP++®devel-  
opment environment. The same emulator hardware that  
supports other SHARC processors also fully emulates the  
ADSP-2136x.  
• Control how the development tools process inputs and  
generate outputs  
• Maintain a one-to-one correspondence with the tool’s  
command line switches  
The VisualDSP++ Kernel (VDK) incorporates scheduling and  
resource management tailored specifically to address the mem-  
ory and timing constraints of DSP programming. These  
capabilities enable engineers to develop code more effectively,  
eliminating the need to start from the very beginning, when  
developing new application code. The VDK features include  
threads, critical and unscheduled regions, semaphores, events,  
and device flags. The VDK also supports priority-based, pre-  
emptive, cooperative, and time-sliced scheduling approaches. In  
addition, the VDK was designed to be scalable. If the application  
does not use a specific feature, the support code for that feature  
is excluded from the target system.  
The VisualDSP++ project management environment lets pro-  
grammers develop and debug an application. This environment  
includes an easy to use assembler (which is based on an alge-  
braic syntax), an archiver (librarian/library builder), a linker, a  
loader, a cycle-accurate instruction-level simulator, a C/C++  
compiler, and a C/C++ runtime library that includes DSP and  
mathematical functions. A key point for these tools is C/C++  
code efficiency. The compiler has been developed for efficient  
translation of C/C++ code to DSP assembly. The SHARC has  
architectural features that improve the efficiency of compiled  
C/C++ code.  
Because the VDK is a library, a developer can decide whether to  
use it or not. The VDK is integrated into the VisualDSP++  
development environment, but can also be used via standard  
command line tools. When the VDK is used, the development  
environment assists the developer with many error-prone tasks  
and assists in managing system resources, automating the gen-  
eration of various VDK-based objects, and visualizing the  
system state, when debugging an application that uses the VDK.  
The VisualDSP++ debugger has a number of important fea-  
tures. Data visualization is enhanced by a plotting package that  
offers a significant level of flexibility. This graphical representa-  
tion of user data enables the programmer to quickly determine  
the performance of an algorithm. As algorithms grow in com-  
plexity, this capability can have increasing significance on the  
designer’s development schedule, increasing productivity. Sta-  
tistical profiling enables the programmer to nonintrusively poll  
the processor as it is running the program. This feature, unique  
to VisualDSP++, enables the software developer to passively  
gather important code execution metrics without interrupting  
the real-time characteristics of the program. Essentially, the  
developer can identify bottlenecks in software quickly and  
efficiently. By using the profiler, the programmer can focus on  
those areas in the program that impact performance and take  
corrective action.  
VisualDSP++ component software engineering (VCSE) is Ana-  
log Devices’ technology for creating, using, and reusing software  
components (independent modules of substantial functionality)  
to quickly and reliably assemble software applications. It allows  
downloading components from the Web, dropping them into  
the application, and publishing component archives from  
within VisualDSP++. VCSE supports component implementa-  
tion in C/C++ or assembly language.  
Use the expert linker to visually manipulate the placement of  
code and data on the embedded system. View memory utiliza-  
tion in a color-coded graphical form, easily move code and data  
to different areas of the processor or external memory with a  
CROSSCORE is a registered trademark of Analog Devices, Inc.  
VisualDSP++ is a registered trademark of Analog Devices, Inc.  
Rev. A  
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Page 10 of 52  
|
December 2006  

ADSP-21363KBCZ-1AA 替代型号

型号 品牌 替代类型 描述 数据表
ADSP-21363KBC-1AA ADI

完全替代

SHARC Processor

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