Datasheet > ADSP-21061_15

ADSP-21061_15

更新时间： 2022-02-26 13:50:54

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
52页	870K
描述
Commercial Grade SHARC DSP Microcomputer

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ADSP-21061_15 数据手册

Commercial Grade

SHARC DSP Microcomputer

ADSP-21061/ADSP-21061L

Dual data address generators with modulo and bit-reverse

addressing

Efficient program sequencing with zero-overhead looping:

single-cycle loop setup

IEEE JTAG Standard 1149.1 test access port and on-chip

emulation

32-bit single-precision and 40-bit extended-precision IEEE

floating-point data formats or 32-bit fixed-point data

format

240-lead MQFP package, thermally enhanced MQFP, 225-ball

plastic ball grid array (PBGA)

Lead (Pb) free packages. For more information, see Ordering

Guide on Page 52.

SUMMARY

High performance signal processor for communications,

graphics, and imaging applications

Super Harvard Architecture

Four independent buses for dual data fetch, instruction

fetch, and nonintrusive I/O

32-bit IEEE floating-point computation units—multiplier,

ALU, and shifter

Dual-ported on-chip SRAM and integrated I/O peripherals—a

complete system-on-a-chip

Integrated multiprocessing features

KEY FEATURES—PROCESSOR CORE

50 MIPS, 20 ns instruction rate, single-cycle instruction

execution

120 MFLOPS peak, 80 MFLOPS sustained performance

CORE PROCESSOR

DUAL-PORTED SRAM

INSTRUCTION

TIMER

JTAG

TWO INDEPENDENT

DUAL-PORTED BLOCKS

CACHE

TEST AND

EMULATION

32 ϫ 48-BIT

PROCESSOR PORT

ADDR DATA

ADDR

I/O PORT

ADDR

DATA

DAG1

DAG2

PROGRAM

SEQUENCER

8 ϫ 4 ϫ 32 8 ϫ 4 ϫ 24

EXTERNAL

PORT

IOD

IOA

PM ADDRESS BUS

ADDR BUS

MUX

DM ADDRESS BUS

MULTIPROCESSOR

INTERFACE

40/32

PM DATA BUS

DM DATA BUS

BUS

CONNECT

(PX)

DATA BUS

MUX

HOST PORT

DATA

FILE

IOP

DMA

CONTROLLER

REGISTERS

(MEMORY

MAPPED)

BARREL

SHIFTER

16 ϫ 40-BIT

MULT

ALU

CONTROL,

STATUS AND

DATA BUFFERS

SERIAL PORTS

(2)

I/O PROCESSOR

Figure 1. Functional Block Diagram

SHARC and the SHARC logo are registered trademarks of Analog Devices, Inc.

Rev. D Document Feedback

Information furnished by Analog Devices is believed to be accurate and reliable.

However, no responsibility is assumed by Analog Devices for its use, nor for any

infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication

or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 U.S.A.

Tel: 781.329.4700

Technical Support

www.analog.com

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