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ADS7870EA/1KG4 PDF预览

ADS7870EA/1KG4

更新时间: 2024-01-18 13:48:15
品牌 Logo 应用领域
德州仪器 - TI 转换器模数转换器光电二极管
页数 文件大小 规格书
43页 494K
描述
12-BIT, 52-kSPS, DATA ACQUISITION SYSTEM WITH ANALOG-TO-DIGITAL CONVERTER, MUX, PGA, AND REFERENCE

ADS7870EA/1KG4 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SSOP包装说明:SSOP-28
针数:28Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.34Is Samacsys:N
最大模拟输入电压:5.7 V最小模拟输入电压:-0.2 V
最长转换时间:4.8 µs转换器类型:ADC, SUCCESSIVE APPROXIMATION
JESD-30 代码:R-PDSO-G28JESD-609代码:e4
长度:10.2 mm最大线性误差 (EL):0.061%
湿度敏感等级:2模拟输入通道数量:8
位数:12功能数量:1
端子数量:28最高工作温度:85 °C
最低工作温度:-40 °C输出位码:BINARY, 2'S COMPLEMENT BINARY
输出格式:SERIAL封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP28,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:5 V
认证状态:Not Qualified采样速率:0.052 MHz
座面最大高度:2 mm子类别:Analog to Digital Converters
最大压摆率:1.7 mA标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:5.3 mmBase Number Matches:1

ADS7870EA/1KG4 数据手册

 浏览型号ADS7870EA/1KG4的Datasheet PDF文件第1页浏览型号ADS7870EA/1KG4的Datasheet PDF文件第2页浏览型号ADS7870EA/1KG4的Datasheet PDF文件第4页浏览型号ADS7870EA/1KG4的Datasheet PDF文件第5页浏览型号ADS7870EA/1KG4的Datasheet PDF文件第6页浏览型号ADS7870EA/1KG4的Datasheet PDF文件第7页 
www.ti.com  
SBAS124C − DECEMBER 1999 − REVISED DECEMBER 2005  
ELECTRICAL CHARACTERISTICS  
(1)  
For the Total System , −40°C T 85°C, V  
otherwise noted).  
= 5 V, BUFIN = 2.5 V (using external reference), 2.5-MHz CCLK and 2.5-MHz SCLK (unless  
A
DD  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
Analog Input  
Input voltage (LNx inputs)  
Linear operation  
−0.2  
V
DD  
+ 0.2  
V
(2)  
Input capacitance  
4 to 9.7  
6
pF  
Common mode  
Differential  
(2)  
Input impedance  
MΩ  
7
(3)  
Channel-to-channel crosstalk  
Maximum leakage current  
Static Accuracy  
Resolution  
V = 2 V , 60 Hz  
PP  
100  
100  
dB  
pA  
I
12  
Bits  
Bits  
No missing codes  
Integral linearity  
G = 1 to 20 V/V  
G = 1 to 20 V/V  
G = 1 to 20 V/V  
G = 1 to 20 V/V  
G = 1 to 10 V/V  
G = 16 and 20 V/V  
G = 1 to 10 V/V  
G = 16 and 20 V/V  
12  
−2.5  
2
0.5  
1
2.5  
LSB  
Differential linearity  
Offset error  
LSB  
−6  
−0.2  
6
0.2  
LSB  
%FSR  
%FSR  
%FSR  
%FSR  
Ratiometric configuration or  
(4)  
external reference  
−0.25  
−0.35  
−0.4  
0.25  
0.35  
0.4  
Full-scale gain error  
Internal reference  
V = −0.2 V to 5.2 V,  
I
DC common-mode rejection ratio, RTI  
92  
dB  
dB  
G = 20 V/V  
Power supply rejection ratio, RTI  
V
DD  
= 5 V 10%, G = 20 V/V  
86  
Dynamic Characteristics  
Continuous mode  
Address mode  
One channel  
52  
52  
20  
Throughput rate  
ksample/s  
Different channels  
(5)  
External clock, CCLK  
0.1  
MHz  
MHz  
MHz  
ns  
Internal oscillator frequency  
Serial interface clock, SCLK  
Data setup time  
2.5  
20  
10  
10  
Data hold time  
ns  
Digital Inputs  
Low-level input voltage, V  
IL  
0.8  
V
V
V
V
V
3.6 V  
2
3
DD  
High-level input voltage, V  
IH  
> 3.6 V  
Logic levels  
DD  
Low-level input current, I  
IL  
1
1
µA  
High-level input current, I  
IH  
(1)  
(2)  
The specifications for the total system are overall analog input to digital output specifications. The specifications for internal functions indicate  
the performance of the individual functions in the ADS7870.  
The ADS7870 uses switched capacitor techniques for the programmable gain amplifier and A/D converter. A characteristic of such circuits is that  
the input capacitance at any selected LNx pin changes during the conversion cycle.  
(3)  
(4)  
One channel on with its inputs grounded. All other channels off with sinewave voltage applied to their inputs.  
Ratiometricconfiguration exists when the input source is configured such that changes in the reference cause corresponding changes in the input  
voltage. The same accuracy applies when a perfect external reference is used.  
The CCLK is divided by the DF value specified by the contents of register 3, A/D Control register, bits D0 and D1 to produce DCLK. The maximum  
value of DCLK is 2.5 MHz.  
(5)  
3

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