Dual 3 MHz, 1200 mA Buck Regulators and Two 300 mA LDO
Regulators With Precision Enable and Power-Good Output
Data Sheet
ADP5134
FEATURES
TYPICAL APPLICATION CIRCUIT
Main input voltage range of 2.5 V to 5.5 V
Two 1200 mA buck regulators and two 300 mA LDO regulators
24-lead, 4 mm × 4 mm LFCSP package
VOUT1
10
L1 1µH
V
VIN1
IN
SW1
FB1
16
2.5V TO
5.5V
15
11
C1
R1
R2
4.7µF
BUCK1
1.2A
C2
10µF
PGND1
ON
EN1
14
Regulator accuracy of 1.8%
12
OFF
PWM
MODE
Factory programmable or external adjustable VOUTx
Precision enable pins for easier power sequencing
Factory selectable power-good pin
3 MHz buck operation with forced PWM and automatic
PWM/PSM modes
BUCK1/BUCK2: output voltage range from 0.8 V to 3.8 V
LDO1/LDO2: output voltage range from 0.8 V to 5.2 V
LDO1/LDO2: input voltage range from 1.7 V to 5.5 V
LDO1/LDO2: high PSRR and low output noise
13
9
PSM/PWM
VOUT2
VIN2
MODE
3
L2 1µH
SW2
FB2
C3
4.7µF
4
8
BUCK2
1.2A
R3
R4
C4
10µF
ON
EN2
OFF
7
PGND2
5
AVIN
17
HOUSEKEEPING
C5
0.1µF
V
INLDO1
1.7V TO
5.5V
VIN3
21
VOUT3
FB3
C6
1µF
20
19
LDO1
300mA
R5
R6
C7
1µF
ON
EN3
22
23
OFF
OFF
V
INLDO2
1.7V TO
5.5V
VIN4
VOUT4
FB4
C8
1µF
24
1
LDO2
300mA
R7
R8
APPLICATIONS
C9
1µF
ON
EN4
2
Power for processors, application specific integrated circuits
(ASICs), field programmable gate arrays (FPGAs), and
radio frequency (RF) chipsets
VDDIO
POWER GOOD
R1
100kΩ
PG
6
Portable instrumentation and medical devices
Space constrained devices
ADP5134
18
AGND
Figure 1.
GENERAL DESCRIPTION
The ADP5134 combines two high performance buck regulators
and two low dropout (LDO) regulators. It is available in a 24-lead
4 mm × 4 mm LFCSP.
Regulators in the ADP5134 are activated through dedicated
enable pins. The default output voltages can be externally set in
the adjustable version or factory programmable to a wide range
of preset values in the fixed voltage version.
The high switching frequency of the buck regulators enables tiny
multilayer external components and minimizes the board space.
When the MODE pin is set to high, the buck regulators operate in
forced pulse-width modulation (PWM) mode. When the MODE
pin is set to low, the buck regulators operate in PWM mode
when the load is above a predefined threshold. When the load
current falls below a predefined threshold, the regulator operates
in power save mode (PSM), improving the light load efficiency.
Table 1. Family Models
Maximum
Model
Channels
Current
Package
ADP5023
2 Bucks, 1 LDO
800 mA, 300 mA
LFCSP (CP-24-10)
ADP5024
ADP5034
2 Bucks, 1 LDO
2 Bucks, 2 LDOs
1.2 A, 300 mA
1.2 A, 300 mA
LFCSP (CP-24-10)
LFCSP (CP-24-10),
TSSOP (RE-28-1)
ADP5037
ADP5033
2 Bucks, 2 LDOs
800 mA, 300 mA
800 mA, 300 mA
LFCSP (CP-24-10)
WLCSP (CB-16-8)
The two buck regulators operate out of phase to reduce the input
capacitor requirement. The low quiescent current, low dropout
voltage, and wide input voltage range of the ADP5134 LDO
regulators extend the battery life of portable devices. The
ADP5134 LDO regulators maintain power supply rejection
greater than 60 dB for frequencies as high as 10 kHz while
operating with a low headroom voltage of 500 mV.
2 Bucks, 2 LDOs
with 2 ENx pins
ADP5040
ADP5041
1 Bucks, 2 LDOs
1.2 A, 300 mA
1.2 A, 300 mA
LFCSP (CP-20-10)
LFCSP (CP-20-10)
1 Bucks, 2 LDOs
with supervisory
circuit, watchdog
function, and
manual reset
Rev. A
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