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ADP322ACPZ-115-R7 PDF预览

ADP322ACPZ-115-R7

更新时间: 2024-01-11 16:35:14
品牌 Logo 应用领域
亚德诺 - ADI 输出元件调节器
页数 文件大小 规格书
24页 1188K
描述
Triple, 200 mA, Low Noise, High PSRR Voltage Regulator

ADP322ACPZ-115-R7 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SON
包装说明:HVQCCN, LCC16,.12SQ,20针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:2.23
可调性:FIXED最大回动电压 1:0.17 V
标称回动电压 1:0.11 V最大回动电压 2:0.17 V
最大绝对输入电压:6.5 V最大输入电压:5.5 V
最小输入电压:1.8 VJESD-30 代码:S-XQCC-N16
JESD-609代码:e3长度:3 mm
最大电网调整率:0.00168%最大负载调整率:0.0328%
湿度敏感等级:3功能数量:1
输出次数:3端子数量:16
工作温度TJ-Max:125 °C工作温度TJ-Min:-40 °C
最大输出电流 1:0.2 A最大输出电流 2:0.2 A
最大输出电压 1:3.366 V最小输出电压 1:3.234 V
标称输出电压 1:3.3 V最大输出电压 2:2.856 V
最小输出电压 2:2.744 V标称输出电压 2:2.8 V
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装等效代码:LCC16,.12SQ,20封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260认证状态:Not Qualified
调节器类型:FIXED POSITIVE MULTIPLE OUTPUT LDO REGULATOR座面最大高度:0.8 mm
子类别:Other Regulators表面贴装:YES
技术:CMOS端子面层:Matte Tin (Sn)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
最大电压容差:2%宽度:3 mm
Base Number Matches:1

ADP322ACPZ-115-R7 数据手册

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Triple, 200 mA, Low Noise,  
High PSRR Voltage Regulator  
Data Sheet  
ADP322/ADP323  
FEATURES  
TYPICAL APPLICATION CIRCUITS  
Fixed (ADP322) and adjustable output (ADP323) options  
Bias voltage range (VBIAS): 2.5 V to 5.5 V  
LDO input voltage range (VIN1/VIN2, VIN3): 1.8 V to 5.5 V  
Three 200 mA low dropout voltage regulators (LDOs)  
16-lead, 3 mm × 3 mm LFCSP  
VBIAS  
ADP322  
VBIAS  
2.5V TO  
5.5V  
+
1µF  
VIN1/VIN2  
1.8V TO  
5.5V  
+
VOUT1  
LDO 1  
EN LD1  
VBIAS  
1µF  
EN1  
ON  
ON  
+
OFF  
OFF  
1µF  
Initial accuracy: 1ꢀ  
Stable with 1 μF ceramic output capacitors  
No noise bypass capacitor required  
3 independent logic controlled enables  
Overcurrent and thermal protection  
Key specifications  
VOUT2  
LDO 2  
EN2  
+
EN LD2  
VBIAS  
1µF  
VIN3  
1.8V TO  
5.5V  
+
VOUT3  
LDO 3  
1µF  
EN3  
ON  
High PSRR  
+
OFF  
EN LD3  
1µF  
76 dB PSRR up to 1 kHz  
70 dB PSRR at 10 kHz  
GND  
60 dB PSRR at 100 kHz  
Figure 1. Typical Application Circuit for ADP322  
40 dB PSRR at 1 MHz  
Low output noise  
VBIAS  
ADP323  
24 μV rms typical output noise at VOUT = 1.2 V  
43 μV rms typical output noise at VOUT = 2.8 V  
Excellent transient response  
Low dropout voltage: 110 mV at 200 mA load  
85 μA typical ground current at no load, all LDOs enabled  
100 μs fast turn on circuit  
VBIAS  
2.5V TO  
5.5V  
+
1µF  
VIN1/VIN2  
1.8V TO  
5.5V  
VOUT1  
+
LDO 1  
EN LD1  
VBIAS  
1µF  
EN1  
+
ON  
ON  
FB1  
FB2  
1µF  
OFF  
OFF  
Guaranteed 200 mA output current per regulator  
−40°C to +125°C junction temperature  
VOUT2  
LDO 2  
EN LD2  
VBIAS  
+
EN2  
1µF  
APPLICATIONS  
Mobile phones  
VIN3  
1.8V TO  
5.5V  
VOUT3  
+
LDO 3  
Digital cameras and audio devices  
Portable and battery-powered equipment  
Portable medical devices  
1µF  
EN3  
+
ON  
FB3  
1µF  
OFF  
EN LD3  
GND  
Post dc-to-dc regulation  
Figure 2. Typical Application Circuit for ADP323  
GENERAL DESCRIPTION  
The ADP322/ADP323 200 mA triple output LDOs combine high  
PSRR, low noise, low quiescent current, and low dropout voltage  
to extend the battery life of portable devices and are ideally suited  
for wireless applications with demanding performance and board  
space requirements.  
The ADP322/ADP323 are available in a miniature 16-lead, 3 mm ×  
3 mm LFCSP package and are stable with tiny 1 μF 30% ceramic  
output capacitors providing the smallest possible board area for  
a wide variety of portable power needs.  
The ADP322 is available in output voltage combinations ranging  
from 0.8 V to 3.3 V and offers overcurrent and thermal protection  
to prevent damage in adverse conditions. The ADP323 adjustable  
triple LDO can be configured for any output voltage between  
0.5 V and 5 V with two resistors for each output.  
The ADP322/ADP323 PSRR is greater than 60 dB for frequencies  
as high as 100 kHz while operating with a low headroom voltage.  
The ADP322/ADP323 offer much lower noise performance than  
competing LDOs without the need for a noise bypass capacitor.  
Rev. D  
Document Feedback  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700 ©2010–2017 Analog Devices, Inc. All rights reserved.  
Technical Support  
www.analog.com  
 
 
 
 

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