ADP2119/ADP2120
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
ADP2119/ADP2120
1
2
3
4
5
10
9
VIN
PVIN
SW
EN
SYNC/MODE
PGOOD
TRK
8
EXPOSED
PAD
7
PGND
GND
6
FB
NOTES
1. THE EXPOSED PAD SHOULD BE SOLDERED TO
AN EXTERNAL GROUND PLANE UNDERNEATH
THE IC FOR THERMAL DISSIPATION.
Figure 3. Pin Configuration (Top View)
Table 4. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
VIN
Bias Voltage Input Pin. Connect a bypass capacitor (0.1 μF minimum) between this pin and GND and a
small (10 Ω) resistor between this pin and PVIN.
2
3
4
5
6
PVIN
SW
PGND
GND
FB
Power Input Pin. Connect this pin to the input power source. Connect a bypass capacitor between this pin and PGND.
Switch Node Output. Connect this pin to the output inductor.
Power Ground. Connect this pin to the power ground plane and to the high current return for the power MOSFET.
Analog Ground. Connect this pin to the ground plane.
Feedback Voltage Sense Input. Connect this pin to a resistor divider from VOUT. For the fixed output version,
connect to VOUT directly.
7
TRK
Tracking Input. To track a master voltage, drive TRK from a resistor divider from the master voltage. If the
tracking function is not used, connect TRK to VIN.
8
9
PGOOD
Power-Good Output (Open Drain). Connect this pin to a resistor to any pull-up voltage < 5.5 V.
SYNC/MODE Synchronization Input (SYNC). Connect this pin to an external clock between 1 MHz and 2 MHz to synchronize
the switching frequency to the external clock (see the Oscillator and Synchronization section for details).
FPWM/PFM Selection (MODE). When this pin is connected to VIN, the PFM mode is disabled and the part works
in continuous conduction mode (CCM) only. When this pin is connected to ground, the PFM mode is enabled
and becomes active at light loads.
10
EN
Precision Threshold Enable Input Pin. An external resistor divider can be used to set the turn-on threshold. To
enable the part automatically, connect the EN pin to VIN. This pin has a 1 MΩ pull-down resistor to GND.
EPAD
Exposed Pad The exposed pad should be soldered to an external ground plane underneath the IC for thermal dissipation.
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