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ADP2118ACPZ-1.0-R7 PDF预览

ADP2118ACPZ-1.0-R7

更新时间: 2024-01-24 12:46:45
品牌 Logo 应用领域
亚德诺 - ADI 转换器稳压器开关式稳压器或控制器电源电路开关式控制器
页数 文件大小 规格书
24页 1228K
描述
3 A, 1.2 MHz/600 kHz High Efficiency Synchronous Step-Down DC-to-DC Converter

ADP2118ACPZ-1.0-R7 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:QFN
包装说明:HVQCCN, LCC16,.16SQ,25针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:7.95
其他特性:PFM CONTROL TECHNIQUE ALSO POSSIBLE模拟集成电路 - 其他类型:SWITCHING REGULATOR
控制模式:CURRENT-MODE控制技术:PULSE WIDTH MODULATION
最大输入电压:5.5 V最小输入电压:2.3 V
标称输入电压:3.3 VJESD-30 代码:S-XQCC-N16
JESD-609代码:e3长度:4 mm
湿度敏感等级:1功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-40 °C最大输出电流:6.4 A
标称输出电压:1 V封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装等效代码:LCC16,.16SQ,25
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):225认证状态:Not Qualified
座面最大高度:0.8 mm子类别:Switching Regulator or Controllers
表面贴装:YES切换器配置:BUCK
最大切换频率:1400 kHz温度等级:AUTOMOTIVE
端子面层:MATTE TIN端子形式:NO LEAD
端子节距:0.65 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4 mm
Base Number Matches:1

ADP2118ACPZ-1.0-R7 数据手册

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ADP2118  
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS  
SYNC/MODE  
FREQ  
TRK  
1
2
3
4
12 PVIN  
11 SW  
10 SW  
ADP2118  
TOP  
VIEW  
9
SW  
FB  
NOTES  
1. THE EXPOSED PAD SHOULD BE SOLDERED TO  
AN EXTERNAL GROUND PLANE UNDERNEATH  
THE IC FOR THERMAL DISSIPATION.  
Figure 3. Pin Configuration  
Table 4. Pin Function Descriptions  
Pin No.  
Mnemonic  
Description  
1
SYNC/MODE  
Synchronization Input (SYNC). Connect this pin to an external clock between 600 kHz and 1.4 MHz to  
synchronize the switching frequency to the external clock (see the Oscillator and Synchronization section for  
details).  
CCM/PFM Selection (MODE). When this pin is connected to VIN, PFM mode is disabled and the ADP2118 only  
works in continuous conduction mode (CCM). When this pin is connected to ground, PFM mode is enabled  
and becomes active at light loads.  
2
3
FREQ  
TRK  
Frequency Selection. Connect to GND to select 600 kHz and VIN for 1.2 MHz.  
Tracking Input. To track a master voltage, drive TRK from a voltage divider from the master voltage. If the  
tracking function is not used, connect TRK to VIN.  
4
FB  
Feedback Voltage Sense Input. Connect to a resistor divider from VOUT. For the fixed output version, connect  
to VOUT directly.  
5
GND  
PGND  
SW  
Analog Ground. Connect to the ground plane.  
Power Ground. Connect to the ground plane and to the output return side of the output capacitor.  
Switch Node Output. Connect to the output inductor.  
Power Input Pin. Connect this pin to the input power source. Connect a bypass capacitor between this pin  
and PGND.  
6, 7, 8  
9, 10, 11  
12, 13  
PVIN  
14  
15  
VIN  
EN  
Bias Voltage Input Pin. Connect a bypass capacitor between this pin and GND and a small (10 Ω) resistor  
between this pin and PVIN.  
Precision Enable Pin. The external resistor divider can be used to set the turn-on threshold. To enable the part  
automatically, connect the EN pin to VIN. This pin has a 1 MΩ pull-down resistor to GND.  
16  
PGOOD  
Power-Good Output (Open Drain). Connect to a resistor to any pull-up voltage <5.5 V.  
17 (EPAD)  
Exposed Pad  
The exposed pad should be soldered to an external ground plane underneath the IC for thermal dissipation.  
Rev. 0 | Page 6 of 24  
 

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